srf-2724cs RF Micro Devices, srf-2724cs Datasheet - Page 16

• Manufacturer Part Number: srf-2724cs
• Description: 2.4ghz Low-if 1.5mbps Fsk Transceiver
• Manufacturer: RF Micro Devices

SRF-2724CS
CONTROL INTERFACES AND RESGISTERED DESCRIPTIONS
Register Information
A 3-wire serial data input bus sets the SRF-2724CS’s transceiver parameters and programs the PLL circuits. Entering 16-bit
words into the SRF-2724CS serial interface performs programming. Three 16-bit registers are partitioned such that 14 bits are
dedicated for data to program the operation and two bits identify the register address. The contents of these registers cannot
be read back via this bus.
The three registers are:
• Register 0: PLL Configuration
• Register 1: Channel Frequency Data
• Register 2: Internal Test Access
Figure 5 shows a register map. Table 3 through Table 5 provide detailed diagrams of the register organization: Table 3 and
Table 4 outline the PLL configuration and channel frequency registers, and Table 5 displays the filter tuning and test mode reg-
ister.
Figure 5: Configuration Register Map
16 of 26
DB1 3
DB1 3
DB1 3
Res.
Res.
Res.
MSB
MSB
MSB
B15
B15
B15
DB12
DB12
DB12
Res.
Res.
Res.
B14
B14
B14
DB11
DB11
DB11
CHQ11
Res.
Res.
B13
B13
B13
DB10
DB10
DB10
CHQ10
Res.
Res.
B12
B12
B12
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DB9
DB9
DB9
CHQ9
RCLP
Res.
B11
B11
B11
DB8
DB8
DB8
CHQ8
LVLO
Res .
B1 0
B1 0
B1 0
DB7
DB7
DB7
CHQ7
Re s.
Re s.
B9
B9
B9
DB6
DB6
DB6
CHQ6
TX M
Res.
B8
B8
B8
DB5
DB5
DB5
CHQ 5
DTM2
TPC
B7
B7
B7
DB4
DB4
DB4
TXCW
CHQ 4
DTM1
Proposed
B6
B6
B6
DB3
DB3
DB3
CHQ3
DTM0
Res.
B5
B5
B5
DB2
DB2
DB2
AOUT
CHQ2
ATM2
B4
B4
B4
DB1
DB1
DB1
CHQ1
ATM1
RD0
B3
B3
B3
DB0
DB0
DB0
CHQ0
ATM0
Q PP
B2
B2
B2
ADR1
ADR1
ADR1
Prelim DS090410
0
0
1
B1
B1
B1
ADR0
ADR0
ADR0
0
1
0
B0
B0
B0