k4s64323lf-sn Samsung Semiconductor, Inc., k4s64323lf-sn Datasheet - Page 2

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k4s64323lf-sn

Manufacturer Part Number
k4s64323lf-sn
Description
2mx32 Mobile Sdram 90fbga
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K4S64323LF-S(D)N/U/P
512K x 32Bit x 4 Banks SDRAM
FEATURES
• 2.5V Power Supply
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
• Burst read single-bit write operation.
• DQM for masking.
• Auto & self refresh.
• 64ms refresh period (4K cycle).
• Extended temperature range (-25 C to 85 C).
• 90balls FBGA( -SXXX -Pb, -DXXX -Pb Free).
FUNCTIONAL BLOCK DIAGRAM
clock .
Industrial Temperature range (-40 C to 85 C) for low power.
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
ADD
CLK
LCKE
CLK
.
LRAS
CKE
Bank Select
LCBR
CS
LWE
RAS
Timing Register
LCAS
CAS
GENERAL DESCRIPTION
Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabri-
cated with SAMSUNG s high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock. I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst lengths and
programmable latencies allow the same device to be useful for a
variety of high bandwidth and high performance memory system
applications.
ORDERING INFORMATION
-S(D)N ; Low Power, Operating Temp : -25 C~85 C.
-S(D)U ; Super Low Power, Operating Temp : -25 C~85 C.
-S(D)P ; Low Power, Operating Temp : -40 C~85 C.
Notes :
1. In case of 55MHz Frequency, CL1 can be supported.
2. In case of 40MHz Frequency, CL1 can be supported.
3. In case of 33MHz Frequency, CL1 can be supported.
The K4S64323LF is 67,108,864 bits synchronous high data rate
K4S64323LF-S(D)N/U/P75 133MHz(CL=3)
K4S64323LF-S(D)N/U/P1H 105MHz(CL=2)
K4S64323LF-S(D)N/U/P1L 105MHz(CL=3)
K4S64323LF-S(D)N/U/P15 66MHz(CL=2/3)
Latency & Burst Length
Programming Register
WE
Data Input Register
Column Decoder
512K x 32
512K x 32
512K x 32
512K x 32
Part No.
DQM
LWCBR
*
Samsung Electronics reserves the right to
change products or specification without
notice.
105MHz(CL=2)
Max Freq.
CMOS SDRAM
Rev. 1.5 Dec 2002
LDQM
*1
*2
*3
Interface Package
LVCMOS
LWE
LDQM
DQi
(Pb Free)
90FBGA
Pb

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