k4d261638k Samsung Semiconductor, Inc., k4d261638k Datasheet - Page 11
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k4d261638k
Manufacturer Part Number
k4d261638k
Description
128mbit Gddr Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4D261638K.pdf
(18 pages)
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9.0 AC & DC OPERATING CONDITIONS
9.1 POWER & DC OPERATING CONDITIONS(SSTL_2 In/Out)
9.2 DC CHARACTERISTICS
Recommended operating conditions Unless Otherwise Noted ( TA=0 to 65°C)
Note :
1. Measured with output open.
2. Current meassured at V
3. Refresh period is 32ms.
K4D261638K
Recommended operating conditions(Voltage referenced to V
Note :
1. Under all conditions V
2. V
3. V
4. V
5. V
6. For any pin under test input of 0V < V
7. For K4D261638K-LC50, V
Operating Current
(One Bank Active)
Precharge Standby Current
in Power-down mode
Precharge Standby Current
in Non Power-down mode
Active Standby Current
power-down mode
Active Standby Current in
in Non Power-down mode
Operating Current
( Burst Mode)
Refresh Current
Self Refresh Current
Device Supply voltage
Output Supply voltage
Reference voltage
Termination voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Output leakage current
may not exceed + 2% of the DC value. Thus, from 0.50*V
REF
tt
IH
IL
of the transmitting device must track V
(mim.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
(max.)= V
is expected to equal 0.50*V
Parameter
Parameter
DDQ
+1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.
DDQ
DD
(max).
DD
must be less than or equal to V
& V
DDQ
DDQ
Symbol
IN
I
I
I
I
of the transmitting device and to track variations in the DC level of the same. Peak to peak noise on the V
= 2.375V to 2.7V.
CC2
CC3
CC2
CC3
I
I
I
I
Symbol
CC1
CC4
CC5
CC6
< V
V
V
V
V
V
V
REF
V
I
DDQ
V
REF
I
OL
P
N
P
N
OH
DD
OL
IL
IH
IL
DD
tt
of the receiving device.
is acceptable. For all other pins that are not under test V
Burst Lenth=2
I
CKE ≤ V
CKE ≥ V
t
CKE ≤ V
CKE ≥ VIH(min), CS ≥ VIH(min),
t
I
All Banks activated.
t
CKE ≤ 0.2V
OL
CC
CC
OL
RC
=0mA ,
=0mA,
=
=
≥
t
t
t
CC
CC
0.49*V
V
RFC
V
V
REF
REF
DD
(min).
DDQ
IL
IH
IL
(min) .
2.375
2.375
-0.30
tt
Min
(max),
(min)
(max),
t
+0.76
t
(min), CS ≥ V
-5
-5
.
CC
Test Condition
CC
+0.15
-
-0.04
, V
DDQ
=
=
REF
SS
t
t
t
CC
RC
CC
t
t
=0V, T
CC
CC
- 11 /19 -
is allowed + 25mV for DC error and an additional + 25mV for AC noise.
(min), Page Burst,
(min)
≥
=
=
t
RC
t
t
CC
CC
IH
A
(min)
=0 to 65°C)
V
(min)
(min)
2.50
2.50
(min),
Typ
REF
-
-
-
-
-
-
-
V
0.51*V
V
V
DDQ
REF
V
REF
2.625
2.625
tt
Max
-0.76
5
5
-
+0.04
+0.30
-0.15
200
135
350
200
-40
45
70
85
10
DDQ
IN
=0V.
Version
128M GDDR SDRAM
Unit
uA
uA
V
V
V
V
V
V
V
V
180
300
180
110
-50
40
60
70
10
Rev. 1.3 July 2007
I
I
OL
OH
Unit
mA
mA
mA
mA
mA
mA
mA
mA
=+15.2mA
=-15.2mA
Note
1, 7
1, 7
2
3
4
5
6
6
1, 2,3
Note
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
REF