s72ns512ne0-7k Meet Spansion Inc., s72ns512ne0-7k Datasheet - Page 6
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s72ns512ne0-7k
Manufacturer Part Number
s72ns512ne0-7k
Description
Stached Multi-chip Product Mcp Mirrorbit? Flash Memory & Dram128 Mb 8m X 16 Bit /256 Mb 16 M X 16 Bit , 110nm Cmos 1.8 Volt-only, Multiplexed, Simultaneous Read/write, Burst Mode Flash Memory And 128/256-mb 8/16-m X 16-bit Ddr Dram
Manufacturer
Meet Spansion Inc.
Datasheet
1.S72NS512NE0-7K.pdf
(17 pages)
2
2.1
4
Connection Diagrams
256 Mb Flash + 128 Mb DDR SDRAM Pinout
D-VCC
F-CE#
F-VPP
DNU
DNU
DNU
DNU
RFU
RFU
A23
A16
A21
A20
NC
N1
A1
B1
C1
D1
E1
F1
G1
H1
K1
L1
M1
P1
J1
Figure 2.1. 133-ball Fine-Pitch Ball Grid Array, 256 Mb Flash + 128 Mb DDR DRAM
D-DQ15
D-TEST
F-AVD#
F-RST#
F-WP#
D-VSS
F-VCC
F-VSS
D-VSS
DNU
A22
A19
NC
NC
A2
B2
C2
D2
E2
F2
G2
H2
K2
M2
N2
P2
J2
L2
D-VSSQ
D-DQ13
D-DQ14
F-WE#
D-CE#
D-VCC
F-CLK
D-A3
A17
A18
NC
NC
NC
NC
A3
B3
C3
D3
E3
G3
H3
K3
M3
N3
F3
J3
L3
P3
D-UDQS
D-VCCQ
D-DQ12
INDEX
D-A6
D-A5
D-A4
A4
B4
C4
D4
M4
N4
P4
D-DQ10
D-DQ11
D-DQ9
D-A9
D-A8
D-A7
C5
M5
N5
A5
B5
P5
A d v a n c e
D-UDQM
D-VSSQ
D-CAS#
D-RAS#
D-DQ8
S72NS-N Based MCPs
D-CKE
M6
N6
A6
B6
C6
P6
D-VCCQ
D-CLK#
D-VSS
D-VSS
D-VSS
D-CLK
M7
A7
B7
C7
N7
P7
D-VCCQ
D-WE#
D-VCC
D-VCC
D-BA1
D-VCC
M8
A8
B8
C8
N8
P8
I n f o r m a t i o n
D-LDQM
D-VSSQ
D-VCC
D-A10
D-A11
D-BA0
A9
B9
C9
M9
N9
P9
D-DQ5
D-DQ6
D-DQ7
D-A1
D-A2
D-A0
A10
B10
C10
M10
N10
P10
D-LDQS
D-DQ3
D-DQ4
D-VCC
A11
B11
C11
M11
RFU
N11
RFU
P11
D-VSSQ
F-VCCQ
F-VCCQ
D-DQ1
D-DQ2
F-OE#
ADQ13
D-VSS
F-VSS
F-VSS
ADQ9
A12
B12
C12
D12
G12
H12
K12
M12
N12
RFU
E12
F12
J12
L12
P12
NC
NC
S72NS128_256ND0_00_B1 November 9, 2005
D-VCCQ
D-DQ0
ADQ11
ADQ12
ADQ15
F-VSS
F-RDY
F-VCC
ADQ8
ADQ1
ADQ3
ADQ7
LA13
A13
DNU
D13
G13
H13
M13
N13
P13
DNU
B13
C13
E13
F13
J13
K13
ADQ10
ADQ14
D-VSS
D-VCC
F-VSS
ADQ0
ADQ2
ADQ4
ADQ5
ADQ6
A14
DNU
B14
DNU
D14
G14
M14
N14
DNU
P14
DNU
C14
E14
F14
H14
J14
K14
L14
Code Flash Only
Index Location
Reserved for
No Connect
Do Not Use
DRAM Only
Future Use
Legend