am49dl640bg Meet Spansion Inc., am49dl640bg Datasheet - Page 12

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am49dl640bg

Manufacturer Part Number
am49dl640bg
Description
64 Mbit 8 M ? 8-bit/4 M ? 16-bit Cmos And 32 Mbit 512k ? 16-bit Pseudo Static Ram Preliminary
Manufacturer
Meet Spansion Inc.
Datasheet
Legend: L = Logic Low = V
SADD = Flash Sector Address, A
Notes:
1.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
March 8, 2002
Operation
(Notes 1, 2)
Read from
Flash
Write to Flash
Standby
Deep Power-down
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector
Unprotect
(Note 5)
Temporary
Sector
Unprotect
Read from pSRAM
Write to pSRAM
Other operations except for those indicated in this column are
inhibited.
time.
= V
If WP#/ACC = V
40%.
IH
the boot sectors protection will be removed.
(Note 7)
(Note 8)
(Note 7)
(Note 8)
(Note 7)
(Note 8)
(Note 7)
(Note 8)
(Note 7)
(Note 8)
(Note 7)
(Note 8)
IL
ACC
, the boot sectors will be protected. If WP#/ACC
(9V), the program time will be reduced by
IL
IL
, CE1#s = V
V
V
, H = Logic High = V
CE#f
0.3 V
0.3 V
Table 2. Device Bus Operations—Flash Byte Mode, CIOf = V
CC
CC
X
X
H
H
L
L
L
L
L
IN
= Address In, D
CE1#s
IL
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
and CE2s = V
CE2s
IH
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
, V
IN
ID
= Data In, D
P R E L I M I N A R Y
IH
= 11.5–12.5 V, V
OE# WE#
H
H
H
H
H
L
X
X
X
X
L
X
at the same
Am49DL640BG
H
X
X
H
H
X
X
H
L
L
L
L
OUT
A1 = H, A0 = L
SADD, A6 = H,
A1 = H, A0 = L
SADD, A6 = L,
= Data Out
HH
Address
= 9.0 ± 0.5 V, X = Don’t Care, SA = pSRAM Address Input, Byte Mode,
A
A
A
A
X
X
X
X
X
X
5. The sector protect and sector unprotect functions may also be
6. If WP#/ACC = V
7. Data will be retained in pSRAM.
8.
IN
IN
IN
IN
implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
protected. If WP#/ACC = V
protection depends on whether they were last protected or
unprotected using the method described in “Sector/Sector Block
Protection and Unprotection”. If WP#/ACC = V
be unprotected.
Data will be lost in pSRAM.
LB#s UB#s RESET#
H
H
X
X
X
X
X
X
X
X
X
X
L
L
L
L
X
X
X
X
X
X
X
X
X
X
H
H
L
L
L
L
IL
, the two outermost boot sectors remain
V
V
0.3 V
0.3 V
V
V
V
CC
CC
H
H
H
H
H
L
ID
ID
ID
IH
, the two outermost boot sector
WP#/ACC
IL
(Note 4)
(Note 4)
(Note 6)
(Note 6)
L/H
L/H
L/H
L/H
H
H
X
X
HH,
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
DQ7–
D
D
D
DQ0
D
D
D
D
D
D
OUT
OUT
OUT
all sectors will
IN
IN
IN
IN
IN
IN
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
D
DQ8
D
D
OUT
OUT
X
X
IN
IN
11

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