xe1202 ETC-unknow, xe1202 Datasheet - Page 21

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xe1202

Manufacturer Part Number
xe1202
Description
Low-power, Integrated Uhf Transceiver
Manufacturer
ETC-unknow
Datasheet
5.3.2
By programming
replaced by TS_BB0 whose value is given in the electrical specifications).
5.4 Transmitted Data Interface
When in transmit mode (MODE[2:0] = 111), the DATAIN signal is used as input for the on-chip modulator. DATAIN
is not sampled, so the bit duration should match the bit rate setting of the receiver. Whenever XE1202 are used on
both sides of the communication link, the bit rate should be one of those defined in the specifications table (BR). In
this case the bit rate error should be less than 5% compared to the specified value.
5.5 Received Data Interface
The outputs of the receiver are the two signals DATAOUT and DCLK. When the bit “RTParam_Bits” is “1”, the bit
synchronizer is turned on, and the two output signals are respectively the output NRZ bit stream and the sampling
clock. The value of DATAOUT is valid at the rising edge of DCLK (see below).
When “RTParam_Bits” is “0”, the bit synchronizer is turned off, and the signal DATAOUT is the output of the
demodulator. In this case DCLK is not used and its value is set to “low”. The maximum current drive on DATAOUT
and DCLK is 2mA @ 2.7V, the maximum load is Clop.
5.6 Pattern Recognition Interface
When this feature is turned on, the incoming NRZ bit stream is compared with a pattern stored in the “Pattern”
register. The PATTERN output is driven by the output of this comparator and is synchronized by DCK. It is “high”
when a match is detected, otherwise “low”. Changes occur at the rising edge of DCK
When the feature is disabled, the PATTERN output is set to “low”. The maximum current drive on PATTERN is
2mA @ 2.7V, the maximum load is Clop.
21
DATAOUT
DATAOUT
PATTERN
PATTERN
(NRZ)
(NRZ)
DCLK
DCLK
Single step sequence for the receiver
DATAIN
DATAIN
DATAOUT
DATAOUT
(NRZ)
(NRZ)
(NRZ)
(NRZ)
DCLK
DCLK
RTParam_WBB to “1”, the boost procedure is inhibited. In this case, the wake-up time is longer (TS_BB2 is
BIT N-x=PATTERN[x]
BIT N-x=PATTERN[x]
BIT N
BIT N
BIT N
BIT N
1/BR
1/BR
BIT N-1=PATTERN[1]
BIT N-1=PATTERN[1]
BIT N+1
BIT N+1
BIT N+1
BIT N+1
BIT N=PATTERN[0]
BIT N=PATTERN[0]
Data Sheet
XE1202
D0211-105

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