bcm5708c Broadcom Corp., bcm5708c Datasheet
bcm5708c
Manufacturer Part Number
bcm5708c
Description
Bcm5708c - 10/100/1000base-t Toe Pci Express Ethernet Controller
Manufacturer
Broadcom Corp.
Datasheet
1.BCM5708C.pdf
(2 pages)
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10/100/1000BASE-T TCP Processing Engine, RDMA, iSCSI, and Ethernet
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Single-chip solution for LAN on Motherboard (LOM) and
Network interface card (NIC) applications
• Integrated 10BASE-T/100BASE-TX/1000BASE-T
• Host interfaces
TCP processing engine
• Full fastpath TCP processing
iSCSI controller
• iSCSI initiator
RDMA controller (RNIC)
• RDMA over TCP (iWARP)—RDMAC 1.0 compliant
• Hardware-based data placement in application buffers without
Other performance features
• Receive side scaling (RSS)
• TCP, IP checksum
• TCP segmentation
• Adaptive interrupts
• Message signal interrupt (MSI) support
Robust manageability
• Universal management port (UMP)
• PXE 2.0 remote boot
• Wake-On LAN
• IPMI pass-through feature
• Statistics gathering (SNMP MIB II, Ethernet-like MIB,
• Comprehensive diagnostic and configuration software suite
• ACPI 1.1a-compliant power management
Advanced network features
• Virtual LANs—802.1q VLAN tagging
• Jumbo frames (9 KB)
• 802.3x flow control
Low-power CMOS design
On-chip power circuit controller
400-ball 21 mm x 21 mm FBGA package
3.3V I/Os
JTAG
transceivers
CPU intervention (user and kernel modes)
Ethernet MIB (802.3x, clause 30))
- PCI Express
®
F E A T U R E S
x4 Host interface
®
Controller with PCI Express
BCM5708C
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Industry’s first 10/100/1000 TOE solution—power and space
optimized for server blade and low-profile NIC applications
Extremely low CPU utilization for TCP/IP applications
• Host CPU is free to run application code
Accelerated IP-based storage
• Lower CPU utilization for file-level storage protocols such as
• iSCSI functionality with low CPU utilization
RDMA support for data placement in application buffers
reduces CPU utilization and lowers data transit latencies.
Future-proof
• Flexible implementation for TCP, iWARP, and iSCSI can
Performance-focused—optimized for throughput and CPU
utilization
• Adaptive interrupts
• RSS reduces CPU utilization on multi-CPU systems
• MSI allows interrupt distribution in a multi-CPU host system
• PCI Express host interface allows a low-latency access to
Robust and highly manageable
• UMP
• PXE 2.0, ACPI 1.1, Wake-On LAN
• IPMI pass-through capability allows on-board management
Server class reliability, availability, and performance features
• Link aggregation and load balancing
• 802.3ad (LACP), generic trunking (GEC/FEC)
Low power for zero airflow implementations
• Advanced power management
Minimal real estate—ideal for LOM
• On-chip power circuit controller
CIFS and NFS
accommodate specification changes and interoperability
issues
CPU and memory resources
management functionality over shared infrastructure
controllers access to the network in OS-present and OS-absent
states
- Switch-dependent
- Switch- and NIC-independent
S U M M A R Y O F B E N E F I T S
enables
®
high
bandwidth
out-of-band
system
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bcm5708c Summary of contents
Page 1
... On-chip power circuit controller • 400-ball FBGA package • 3.3V I/Os • JTAG BCM5708C Controller with PCI Express • Industry’s first 10/100/1000 TOE solution—power and space optimized for server blade and low-profile NIC applications • Extremely low CPU utilization for TCP/IP applications • ...
Page 2
... Clock PLL LED Control LED Signals The BCM5708C provides a fully integrated Layer 4 and Layer 5 solution—TCP/IP, RDMA, and iSCSI 1.0 along with a complete 10/100/ 1000BASE-T Gigabit Ethernet, IEEE 802.3™ compliant media access control (MAC), and physical layer transceiver solution for high- performance network applications ...