bcm5708s Broadcom Corp., bcm5708s Datasheet
bcm5708s
Manufacturer Part Number
bcm5708s
Description
Bcm5708s - 1000/2500base-x Toe, Rdma, Iscsi Pci Express Ethernet Controller
Manufacturer
Broadcom Corp.
Datasheet
1.BCM5708S.pdf
(2 pages)
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SINGLE-PORT 1000/2500BASE-X ETHERNET CONTROLLER WITH INTEGRATED TCP
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Single-chip solution for LAN-on Motherboard (LOM) and
Network Interface Card (NIC) applications
• Integrated 1000/2500BASE-X SerDes
• Host interfaces
TCP processing engine
• Full fast-path TCP processing
iSCSI controller
• iSCSI initiator
RDMA controller (RNIC)
• RDMA over TCP (iWARP)—RDMAC 1.0 compliant
• Hardware-based data placement in application buffers without
Other performance features
• Receive Side Scaling (RSS)
• TCP, IP checksum
• TCP segmentation
• Adaptive interrupts
• Message Signal Interrupt (MSI) support
Robust manageability
• Universal Management Port (UMP)
• PXE 2.0 remote boot
• Wake-On LAN
• IPMI pass-through feature
• Statistics gathering (SNMP MIB II, Ethernet-like MIB,
• Comprehensive diagnostic and configuration software suite
• ACPI 1.1a compliant power management
Advanced network features
• Virtual LANs—802.1q VLAN tagging
• Jumbo frames (9 KB)
• 802.3x flow control
Low-power CMOS design
On-chip power circuit controller
400-ball 21 mm x 21 mm FBGA package
3.3V I/Os
JTAG
CPU intervention (for User and Kernel modes)
Ethernet MIB (802.3x, clause 30))
- Auto-negotiation between 1G and 2.5G modes
- SGMII support
- PCI Express
PROCESSING ENGINE, RDMA, iSCSI WITH PCI EXPRESS
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F E A T U R E S
x4 Host interface
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BCM5708S
Industry’s first 1000/2500 SerDes-based TOE solution—power
and space optimized for server blade and low-profile NIC
applications
Extremely low CPU utilization for TCP/IP applications
• Host CPU is free to run application code.
Accelerated IP-based storage
• Lower CPU utilization for file-level storage protocols such as
• iSCSI functionality with low CPU utilization
RDMA support for data placement in application buffers
reduces CPU utilization and lowers data transit latencies.
Future-proof
• Flexible implementation for TCP, iWARP, and iSCSI can
Performance-focused – optimized for throughput and CPU
utilization
• Adaptive interrupts
• 2.5 Gigabit Ethernet
• RSS reduces CPU utilization on multi-CPU systems.
• MSI allows interrupt distribution in a multi-CPU host system.
• PCI Express host interface allows a low-latency access to CPU
Robust and highly manageable
• UMP enables high bandwidth out-of-band system management
• PXE 2.0, ACPI 1.1, Wake-On LAN
• IPMI pass-through capability allows on-board management
Server class reliability, availability, and performance features
• Link aggregation and load balancing
• 802.3ad (LACP), generic trunking (GEC/FEC)
Low power for zero airflow implementations
• Advanced power management
Minimal real estate—ideal for LOM
• On-chip power circuit controller
CIFS and NFS
accommodate specification changes and interoperability
issues.
and memory resources.
functionality over shared infrastructure.
controllers access to the network in OS-present and OS-absent
states.
- Switch-dependent
- Switch and NIC independent
S U M M A R Y O F B E N E F I T S
®
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bcm5708s Summary of contents
Page 1
... On-chip power circuit controller • 400-ball FBGA package • 3.3V I/Os • JTAG BCM5708S • Industry’s first 1000/2500 SerDes-based TOE solution—power and space optimized for server blade and low-profile NIC applications • ...
Page 2
... SerDes TX Clock PLL The BCM5708S provides a fully integrated Layer 4 and Layer 5 solution – TCP/IP, RDMA, and iSCSI along with a complete 1000/2500BASE-X Gigabit Ethernet, IEEE 802.3™ compliant Media Access Control (MAC), and Physical Layer Transceiver solution for high performance network applications. By itself, the BCM5708S provides a complete single-chip Gigabit Ethernet NIC with a TCP/IP Processing Engine, RDMA NIC (RNIC), iSCSI HBA, or LOM solution ...