njg1667md7 New Japan Radio Co.,Ltd, njg1667md7 Datasheet - Page 6
![no-image](/images/no-image-200.jpg)
njg1667md7
Manufacturer Part Number
njg1667md7
Description
Sp5t Switch Gaas Mmic
Manufacturer
New Japan Radio Co.,Ltd
Datasheet
1.NJG1667MD7.pdf
(7 pages)
NJG1667MD7
■ APPLICATION CIRCUIT
■ TEST PCB LAYOUT
PRECAUTIONS
P5
- 6 -
[1] The DC blocking capacitors should be placed at RF terminal of P1, P2, P3, P4, P5 and PC.
[2] The bypass capacitor (C7) should be placed as close as possible to VDD terminal.
[3] For good RF performance, all GND terminals are should be connected to PCB ground plane.
Please choose appropriate capacitance values to the application frequency.
P4
VDD
1pin mark
PARTS LIST
C1~C6
Part ID
GND
C7
P5
C5
C4
(TOP VIEW)
C7
1000pF
C5
56pF
C7
P3
1000pF
C3
Value
56pF
1
2
3
4
C2
P4
56pF
GND
C6
C1
C4
CTL1
14
5
(Top view)
DECODER
CTL2
13
P3
6
MURATA MFG
C3
56pF
PC
P2
(GRM15)
CTL3
Notes
12
7
C2
56pF
P2
10
11
9
8
P1
56pF
56pF
C6
C1
(GHz)
PCB SIZE=39.0 x 20.0mm
PCB: FR-4, t=0.2mm
CAPACITOR: size 1005
STRIP LINE WIDTH=0.4mm
Freq.
Losses of PCB and Connectors
1.0
2.0
2.5
P1
PC-P1
PC-P5
0.41
0.62
0.74
PC
Loss (dB)
PC-P2
PC-P4
0.43
0.65
0.79
PC-P3
0.36
0.52
0.61