m4-128n-64-10ai Lattice Semiconductor Corp., m4-128n-64-10ai Datasheet - Page 10
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m4-128n-64-10ai
Manufacturer Part Number
m4-128n-64-10ai
Description
High Performance E Cmos In-system Programmable Logic
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.M4-128N-64-10AI.pdf
(46 pages)
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Macrocell
The macrocell consists of a storage element, routing resources, a clock multiplexer, and
initialization control. The macrocell has two fundamental modes: synchronous and
asynchronous (Figure 5). The mode chosen only affects clocking and initialization in the
macrocell.
In either mode, a combinatorial path can be used. For combinatorial logic, the synchronous
mode will generally be used, since it provides more product terms in the allocator.
10
From Logic Allocator
From PAL-Block
Clock Generator
Individual Clock
Product Term
Product Term
Product Terms
Initialization
From Logic
Initialization
Individual
Allocator
PAL-Clock
Individual macrocell resources
PAL-Block
Generator
Common PAL-block resource
From
Power-Up
Block CLK0
Block CLK1
Reset
Block CLK0
Block CLK1
Block CLK2
Block CLK3
Power-Up
Reset
a. Synchronous mode
b. Asynchronous mode
Figure 5. Macrocell
MACH 4 Family
SWAP
D/T/L
AP
D/T/L
AP
AR
Q
AR
Q
To Output and Input
Switch Matrices
To Output and Input
Switch Matrices
17466G-009
17466G-010
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