s71gl128nc0 Meet Spansion Inc., s71gl128nc0 Datasheet - Page 10

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s71gl128nc0

Manufacturer Part Number
s71gl128nc0
Description
Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 64 Megabit 4m X 16-bit Psram
Manufacturer
Meet Spansion Inc.
Datasheet

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Input/Output Descriptions
Logic Symbol
10
A24-A0
A23-A0
A22-A0
DQ15-DQ0
OE#
WE#
V
NC
RESET#
WP#/ACC
CE1#s, CE2s
CE#f1
V
V
UB#s
LB#s
RFU
RY/BY#
SS
CC
CC
f
s
Max+1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
* A
Max
LB#
CE#f1
A d v a n c e
CE1#s
CE2s
OE#
WE#
WP#/ACC
A
WE#
RESET#
UB#
25 Address inputs (512 Mb)
24 Address inputs (256 Mb)
23 Address inputs (128 Mb)
Data input/output
Output Enable input. Asynchronous relative to CLK
for the Burst mode.
Write Enable input.
Ground
No Connect; not connected internally
Hardware reset input. Low = device resets and
returns to reading array data
Hardware write protect input / programming
acceleration input.
Chip-enable input for pSRAM.
Chip-enable input for Flash 1.
Flash 3.0 Volt-only single power supply.
pSRAM Power Supply.
Upper Byte Control (pSRAM).
Lower Byte Control (pSRAM).
Reserved for future use.
Ready/Busy output.
Max
= A24 [512 Mb]
= A23 [256 Mb]
= A22 [128 Mb]
*–A0
DQ15–DQ0
RY/BY#
I n f o r m a t i o n
16
S71GL512_256_128NC0_00_A0 December 17, 2004

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