89hpes16t7 Integrated Device Technology, 89hpes16t7 Datasheet - Page 8

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89hpes16t7

Manufacturer Part Number
89hpes16t7
Description
16-lane, 7-port Pcie I/o Expansion Switch
Manufacturer
Integrated Device Technology
Datasheet

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IDT 89HPES16T7 Data Sheet
JTAG_TRST_N
JTAG_TDO
JTAG_TMS
Signal
Type
O
I
I
JTAG Data Output. This is the serial data shifted out from the boundary
scan logic or JTAG Controller. When no data is being shifted out, this signal
is tri-stated.
JTAG Mode. The value on this signal controls the test mode select of the
boundary scan logic or JTAG Controller.
JTAG Reset. This active low signal asynchronously resets the boundary
scan logic and JTAG TAP Controller. An external pull-up on the board is
recommended to meet the JTAG specification in cases where the tester
can access this signal. However, for systems running in functional mode,
one of the following should occur:
1) actively drive this signal low with control logic
2) statically drive this signal low with an external pull-down on the board
Table 6 Test Pins (Part 2 of 2)
8 of 33
Name/Description
March 25, 2008

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