am79c203 ETC-unknow, am79c203 Datasheet - Page 41

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am79c203

Manufacturer Part Number
am79c203
Description
Advanced Subscriber Line Interface Circuit Aslic Device
Manufacturer
ETC-unknow
Datasheet

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PROGRAMMABLE FILTERS
General Description of CSD Coefficients
The filter functions are performed by a series of multiplications and accumulations. A multiplication is accomplished
by repeatedly shifting the multiplicand and summing the result with the previous value at that summation node. The
method used in the ASLAC device is known as Canonic Signed Digit (CSD) multiplication and splits each coefficient
into a series of CSD coefficients.
Each programmable FIR filter section has the following general transfer function:
where the number of taps in the filter = n + 1.
The transfer function for IIR part of Z and B filters is:
The values of the user-defined coefficients (h
the following general equation:
where:
The value of h
or
The limit on the negative powers of 2 is determined by the length of the registers in the ALU.
The coefficient h
the left part represents whole numbers, the right part represents decimal fractions, and a decimal point separates
them. The first binary 1 is shifted M
the right of the decimal point; the third binary 1 is shifted M
Note that when M
the result is another binary 1 in front of the decimal point, giving a total value of binary 10 in front of the decimal point
(i.e., a decimal value of 2.0). The value of N, therefore, determines the range of values the coefficient h
(e.g., if N = 3 the maximum and minimum values are ±3, and if N = 4 the values are between ±4).
Detailed Description of ASLAC Device Coefficients
The CSD coding scheme in the ASLAC device uses a value called m
of the decimal point for the first binary 1. m
m
N is unchanged. Equation 3 is now modified (in the case of N = 4) to:
3
represents the number of shifts to the right of the second binary 1. Note that the range of values determined by
M
B
N = number of CSD coefficients.
±1.0 multiplied by 2
±1.0 multiplied by 1, or 1/2, or 1/4 … 1/128 …
HF z ( )
Hl Z ( )
h
h
h
h
i
i
i
i
i
i
= sign = ±1
=
=
=
=
= the number of shifts = M
B
B
C
C
=
=
1
1
1
1
2
2
2
2
---------------------------------
1 h
h
i
0
M
M
m
m
in Equation 3 represents a decimal number which is broken down into a sum of successive values of:
+
1
1
1
1
ì
í
î
+
+
i
+
(
h
1
n
in Equation 3 can be considered to be a value made up of N binary 1s in a binary register where
1
1
1
C
B
B
+
+
z
is 0, the resulting value is a binary 1 in front of the decimal point, that is, no shift. If M
1
2
2
1 –
1
C
C
2
2
)
z
2
2
+
M
M
2
2
1
h
2
2
–0
m
(
2
+ +
+
m
z
2
, or 2
B
1
[
2 –
1
+
3
+
m
+
2
2
C
)
M
–1
+
3
+
3
2
+
, or 2
+
C
i
B
h
1
m
≤ M
B
N
1
n
C
3
4
z
2
(
bits to the right of the decimal point; the second binary 1 is shifted M
2
2
n –
1
C
–2
M
i
+
M
+ 1
3
N
2
C
4
… 2
2
4
(
m
2
represents the distance shifted to the right of the previous binary 1, and
ASLIC/ASLAC Products
1
m
i
–7
+
) are assigned via the MPI. Each of the coefficients (h
4
m
)
2
]
+
ü
ý
þ
m
3
)
+
C
1
C
3
2
C
bits to the right of the decimal point, and so on.
3
C
4
2
(
m
i
, where m
1
+
m
2
+
m
3
+
m
i
represents the distance shifted right
4
)
i
) is defined in
Equation (1)
Equation (2)
Equation (3)
Equation (4)
Equation (5)
Equation (6)
2
i
is also 0,
can take
2
bits to
41

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