am79c982 Advanced Micro Devices, am79c982 Datasheet - Page 23

• Manufacturer Part Number: am79c982
• Description: Basic Integrated Multiport Repeater Bimr
• Manufacturer: Advanced Micro Devices

Port Activity Monitor
Two pins, CRS and STR, are used to serially output the
state of the internal Carrier Sense signals from the AUI
and the eight (four) TP ports. This function together with
external hardware and/or software can be used to moni-
tor repeater receive and/or collision activity.
The resolution of the CRS signal is 2 ms. The incoming
data is sampled repeatedly during each 2 ms period. If
any activity occurs (regardless of length) during any
2 ms period, this activity will be latched. At the start of
the next 2 ms period, the bIMR device will examine the
latches for each port. For any port in which activity
occurred, the corresponding bit in the CRS output
stream will remain set for the 2 ms period. This means
that during any 2 ms time interval the CRS output bit
stream represents carrier activity that occurred in the
preceding 2 ms period (see Figure 7). During the last
Note: When used in minimum mode.
SHCK
(Note)
CRS
STR
RST
SO
X1
or AUI
Figure 6. bIMR4 Management Port Minimum Mode and Port Activity Monitor Signal Relationship
TPX
1
2
Figure 7. Carrier Sense Signal Output Corresponding to the
10
AUI
AUI
12
States of AUI or Twisted-Pair Port Activity
TP0
TP0
16
PRELIMINARY
Am79C982
2 ms
1000 ns of the 2 ms period, the CRS signal is reset to
LOW. Figure 7 illustrates this by showing the output of
the register in the recommended LED drive circuitry of
Figure 8.
The CRS pin is used to indicate carrier sense for all nine
ports of the device (five for the Am79C982-4). This pin
outputs a ten bit stream that repeats every microsecond.
During this period there are ten bit times (100 ns). Each
port has a “time slot” in this repeating bit stream (see
Figure 4). For example, activity on the AUI port is repre-
sented by the state of the CRS pin during the second
100 ns period of the one microsecond cycle.
Because the one microsecond sequence is repeated
unchanged for most of the longer 2 ms cycle, any LED
driven by the latch and shift register shown in Figure 3
and 5 will remain on for at least 2 ms. This minimizes the
need for external pulse stretching logic.
TP1
TP1
20
1000 ns
TP2
TP2
24
TP3
TP3
28
AMD
19406B-14
AUI
AUI
19406B-13
32
CRS
1–25