zl50052 Zarlink Semiconductor, zl50052 Datasheet - Page 33
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zl50052
Manufacturer Part Number
zl50052
Description
8 K Channel Digital Switch With High Jitter Tolerance, Single Rate 32 Mbps , And 16 Inputs And 16 Outputs
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50052.pdf
(59 pages)
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Bit
1:0
4
3
2
Reserved
MS[1:0]
Name
MBP
OSB
Reset
Value
0
0
0
0
Memory Block Programming
When LOW, the memory block programming mode is disabled.
When HIGH, the connection memory block programming mode is ready to program
the Local Connection Memory (LCM) and the Backplane Connection Memory
(BCM).
Output Stand By
This bit enables the BSTo0-7 and LSTo0-7 serial outputs.
When LOW, BSTo0-7 and LSTo0-7 are driven HIGH or high impedance, dependent
on the BORS and LORS pin settings respectively.
When HIGH, BSTo0-7 and LSTo0-7 are enabled.
Reserved
Must be set to 0 for normal operation
Memory Select Bits
These three bits select the connection or data memory for subsequent microport
memory access operations:
00 selects Local Connection Memory (LCM) for read or write operations.
01 selects Backplane Connection Memory (BCM) for read or write operations.
10 selects Local Data Memory (LDM) for read-only operation.
11 selects Backplane Data Memory (BDM) for read-only operation.
Output Control with ODE pin and OSB bit
Table 11 - Control Register Bits (continued)
ODE Pin
0
1
1
Zarlink Semiconductor Inc.
ZL50052
OSB bit
33
X
0
1
Description
BSTo0-7, LSTo0-7
Disabled
Disabled
Enabled
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