zl50015qcc1 Zarlink Semiconductor, zl50015qcc1 Datasheet - Page 112
zl50015qcc1
Manufacturer Part Number
zl50015qcc1
Description
Enhanced 1 K Digital Switch With Stratum 4e Dpll
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50015QCC1.pdf
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† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
AC Electrical Characteristics
AC Electrical Characteristics
1
2
3
4
1
2
3
4
(shares output pin
with FPo_OFF2)
CKo4 Output Clock Period
CKo4 Output High Time
CKo4 Output Low Time
CKo4 Output Rise/Fall Time
CKo4 Output Clock Period
CKo4 Output High Time
CKo4 Output Low Time
CKo4 Output Rise/Fall Time
CKo4
CKo5
FPo0
FPo5
Characteristic
Characteristic
Figure 46 - FPo4 and CKo4 Timing Diagram (1.544/2.048 MHz)
Output Frame Boundary
Output Frame Boundary
†
†
- CKo4 (1.544 MHz) Timing (Only when DPLL is active)
- CKo4 (2.048 MHz) Timing (Only when DPLL is active)
Figure 47 - CKo5 Timing Diagram (19.44 MHz)
t
t
t
t
t
FPW5
FODF5
t
CKP4
CKP5
CKH4
CKH5
Zarlink Semiconductor Inc.
ZL50015
112
t
t
rCK4
rCK4
Sym.
t
t
Sym.
t
t
t
t
CKP4
CKH4
CKP4
CKH4
CKL4
CKL4
, t
, t
t
t
fCK4
fCK5
fCK4
fCK4
Min.
Min.
645
320
320
485
241
241
t
FODR5
t
t
CKL4
CKL5
Typ.
Typ.
648
324
324
488
244
244
‡
‡
Max.
Max.
650
327
327
492
247
247
5
5
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
t
t
rCK4
rCK5
V
V
V
Data Sheet
V
CT
CT
CT
CT
C
C
L
L
Notes
Notes
= 30 pF
= 30 pF
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