mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 87
mt9074ap1
Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9074AP1.pdf
(151 pages)
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Per Channel Transmit Signaling (Pages 5 and 6) (T1)
Page 05H, addresses 10000 to 11111, and page 06H addresses 10000 to 10111 contain the Transmit Signaling
Control Words for DS1 channels 1 to 16 and 17 to 24 respectively. Table 107 illustrates the mapping between the
addresses of these pages and the DS1 channel numbers. Control of these bits for any one channel is through the
processor or controller port when the Per Time Slot Control bit RPSIG bit is high. Table 72 describes bit allocation
within each of these registers.
Serial per channel transmit signaling control through CSTi is selected when the Per Time Slot Control bit RPSIG bit
is low. Table 71 describes the bit allocation within each of the 24 active ST-BUS time slots of CSTi.
Page 5-6 Address:
Equivalent DS1
channel
Page 6 Address:
Equivalent DS1
channel
7 - 4
Bit
3
2
1
0
Name
C(n)
D(n)
A(n)
B(n)
- - -
Table 72 - Transmit Channel Associated Signaling (T1) (Pages 5,6)
Table 71 - Page 5, 6 Address Mapping to DS1 Channels (T1)
0
1
0
17
Unused.
Transmit Signaling Bits A for Channel n. Where signaling is enabled, these bits
are transmitted in bit position 8 of the 6th DS1 frame (within the 12 frame
superframe structure for D4 superframes and the 24 frame structure for ESF
superframes).
Transmit Signaling Bits B for Channel n. Where signaling is enabled, these bits
are transmitted in bit position 8 of the 12th DS1 frame (within the 12 frame
superframe structure for D4 superframes and the 24 frame structure for ESF
superframes).
Transmit Signaling Bits C for Channel n. Where signaling is enabled, these bits
are transmitted in bit position 8 of the 18th DS1 frame within the 24 frame structure
for ESF superframes. In D4 mode these bits are unused.
Transmit Signaling Bits D for Channel n. Where signaling is enabled, these bits
are transmitted in bit position 8 of the 24th DS1 frame within the 24 frame structure
for ESF superframes. In D4 mode these bits are unused.
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Functional Description
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Data Sheet
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