mt8962asr1 Zarlink Semiconductor, mt8962asr1 Datasheet - Page 19

• Manufacturer Part Number: mt8962asr1
• Description: Integrated Pcm Filter Codec
• Manufacturer: Zarlink Semiconductor

AC Electrical Characteristics - Receive (D/A) Path
T
Filter Gain Setting = 0dB. Outputs unloaded unless otherwise specified.
A
10
1
2
3
4
5
6
7
8
9
=0 to 70
N
O
G
A
A
L
°
C, V
Analog output at V
equivalent to the overload
decision level at codec
Absolute Gain (0dB setting)
Absolute Attenuation (-1dB
to -7dB settings)
Gain Variation
Gain Tracking
(See Figure 12) (Method 1)
Quantization
Distortion
(See Fig. 13)
Idle Channel
Noise
Single Frequency Noise
Harmonic Distortion
(2nd or 3rd Harmonic)
Intermodulation
Distortion
DD
=5V
Characteristics
±
5%, V
EE
=-5V
With Temp.
With Supplies
CCITT G712
CCITT G712
(Method 2)
AT & T
CCITT G712
(Method 1)
CCITT G712
(Method 2)
AT & T
C-message
Psophometric
CCITT G712
2 tone
AT & T
4 tone
R
±
5%, V
MT8960/61/62/63/64/65/66/67
Ref
=2.5V
±
0.5%, GNDA=GNDD=0V, Clock Frequency = 2.048MHz,
IMD
IMD
IMD
Sym.
G
G
GT
GT
D
D
V
N
G
N
N
Zarlink Semiconductor Inc.
OUT
QR1
QR2
SFR
ART
ARS
AR
CR
PR
R1
R2
R2
R3
R4
- Voltages are with respect to GNDD unless otherwise stated.
28.00
35.60
33.90
29.30
14.30
36.40
30.40
25.40
-0.25
-0.35
-0.25
-0.25
-0.50
-0.25
-0.50
-1.50
Min.
19
4.829
5.000
Typ.*
0.01
0.04
+0.25
+0.35
+0.25
+0.25
+0.50
+0.25
+0.50
+1.50
Max.
-75
-56
-46
-41
-47
-49
12
dBrnC0 µ-Law Only
dBm0p CCITT G712
dBm0
Units
dB/V
V
V
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
pp
pp
Level at codec:
µ-Law: 3.17 dBm0
A-Law: 3.14 dBm0
R
See Note 7
0 dBm0
@
T
Sinusoidal Level:
+3 to -10 dBm0
Noise Signal Level:
-10 to -55 dBm0
-55 to -60 dBm0
Sinusoidal Level:
+3 to -40 dBm0
-40 to -50 dBm0
-50 to -55 dBm0
Noise Signal Level:
-3 dBm0
-6 to -27 dBm0
-34 dBm0
-40 dBm0
-55 dBm0
Sinusoidal Input Level:
0 to -30 dBm0
-40 dBm0
-45 dBm0
CCITT G712
Input Signal 0 dBm0
at 1.02 kHz
2nd order products
3rd order products
From nominal,
A
L
1004Hz
=0°C to 70°C
=10 KΩ
Test Conditions
@
1004Hz
Data Sheet