92hd83 Integrated Device Technology, 92hd83 Datasheet - Page 38
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92hd83
Manufacturer Part Number
92hd83
Description
Single Chip Pc Audio System Codec+speaker Amplifier+capless Hp+ldo
Manufacturer
Integrated Device Technology
Datasheet
1.92HD83.pdf
(294 pages)
- Current page: 38 of 294
- Download datasheet (4Mb)
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD83
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
2.22.4. EAPD
2.22.5. Analog PC_Beep
2.22.6. Firmware/Software Requirements:
EAPD
(pin)
Since the Aux Audio mode overrides the default behavior but not the actual port settings when in
reset, the logical state of the EAPD pin must be overridden as well. When Aux Audio mode is
enabled and the part is in reset as described above, the logical state of EAPD will be 1 (External
Amplifier Powered Up) unless held low by an external circuit. This ensures that audio pass-thru and
analog PC_Beep will be supported.
Analog PC_Beep may be supported in Aux Audio mode. By default, analog PC_Beep is disabled. If
the CODEC is programmed to enable analog PC_Beep and Aux Audio mode is enabled, the next
time reset is asserted, the analog PC_Beep pin will be mixed at each of the active outputs.
If it is desirable to stop the HD Audio bus while the CODEC is in D3 under OS control per ECR-15b,
Firmware must disable the AUX Audio Mode support in the CODEC prior to loading the OS. If Aux
Audio Mode is not disabled in the CODEC, the CODEC will report to the OS driver that stopping the
bus clock while the CODEC is in D3 is not supported or not available.
1.default value for Aux Audio Enable is determined by bond option.
0
1
1
1
Support
Enable
Aux
X
0
1
1
1
detect
D MIc
X
X
1
1
detect
Port F
X
X
0
1
Ports A, B, C,
D, E detect
38
NA
NA
NA
NA
DMIC routed through CODEC DAC to port E. DMIC
Clock provided from external source through DCLK
CODEC DAC and Port E disabled
92HD83
pin. 3.072MHz typ.
Widget controlled
Port E behavior
disabled
PC AUDIO
V 0.96 01/09
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