mt88l85anr1 Zarlink Semiconductor, mt88l85anr1 Datasheet - Page 12

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mt88l85anr1

Manufacturer Part Number
mt88l85anr1
Description
3 V Integrated Dtmf Transceiver With Power-down And Adaptive Micro Interface
Manufacturer
Zarlink Semiconductor
Datasheet
DTMF Clock Circuit
The internal clock circuit is completed with the additions of a standard television colour burst crystal. The crystal
specification is as follows:
Frequency:
Frequency Tolerance:
Resonance Mode:
Load Capacitance:
Maximum Series Resistance:
Maximum Drive Level:
A number of MT88L85 devices can be connected as shown in Figure 11 such that only one crystal is required.
Alternatively, the OSC1 inputs on all devices can be driven from a CMOS buffer with the OSC2 outputs left
unconnected.
Microprocessor Interface
The MT88L85 design incorporates an adaptive interface, which allows it to be connected to various kinds of
microprocessors. Key functions of this interface include the following:
Continuous activity on DS/RD is not necessary to update the internal status registers.
Compatible with Motorola and Intel processors. Determines whether input timing is that of an Intel or
Motorola controller by monitoring
DS/RD, on the CS falling edge.
e.g.CTS Knights MP036S
Toyocom TQC-203-A-9S
THD (%) = 100
OSC1 OSC2
3.579545 MHz
3.579545 MHz
±0.1%
Parallel
18 pF
150 ohms
2 mW
MT88L85
Figure 11 - Common Crystal Connection
Equation 2. THD (%) For a Dual Tone
Zarlink Semiconductor Inc.
MT88L85
OSC1 OSC2
V
MT88L85
2
2L
V
12
+
2
3H
V
2
V
+ ..
3L
2
L
+ ....
V
+
2
V
nH
V
2
H
+
2
nL
V
2
+
OSC1 OSC2
IMD
V
MT88L85
2
2H
+
Data Sheet

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