ml2240 Oki Semiconductor, ml2240 Datasheet
ml2240
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ml2240 Summary of contents
Page 1
... PCM, 16-bit PCM, 2-bit ADPCM2, and 4-bit ADPCM2 algorithms. And the sound volume is adjustable as well. The ML2240 incorporates a 14-bit D/A converter, and low-pass filter easy to configure a speech synthesizer by externally connecting a power amplifier and a CPU to the ML2240. FEATURES • Non-linear 8-bit PCM, 8-bit PCM, 16-bit PCM, 2-bit ADPCM2, and 4-bit ADPCM2 algorithms • ...
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... OKI Semiconductor BLOCK DIAGRAM FEDL2240DIGEST-02 ML2240 Family 2/24 ...
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... RD15/A-1 6 BYTE 7 RA0 8 RA1 9 RA2 10 RA3 11 RA4 12 RA5 13 RA6 14 RA7 15 RA8 16 RA9 17 RA10 18 RA11 19 RA12 20 80-pin plastic TQFP NC: No Connection FEDL2240DIGEST-02 ML2240 Family SERIAL ROE 58 57 DGND RCS AOUTR 53 DAOR AOUTL 50 DAOL 49 AGND 48 D7/DI 47 D6/SCK 46 D5/DO 45 D4/STASEL ...
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... CPU interface data bus pins in the parallel input interface become data input pins when “L” level. I/O They become channel status output pins in the serial input interface. These pins also become channel status output pins when “L” level. FEDL2240DIGEST-02 ML2240 Family 4/24 ...
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... RA22-0, A-1, and ROE pins are in high impedance. Output enable pin for an externally connected memory. O RCS pin = “H” level: High impedance CPU interface switching pin. I “H” level: Serial input interface, “L” level: Parallel input interface FEDL2240DIGEST-02 ML2240 Family 5/24 ...
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... Analog power supply pin. Insert a 0.1 µF or larger bypass capacitor between this pin and AGND — pin. Digital power supply pin. Insert a 0.1 µF or larger bypass capacitor between this pin and DGND — pin. — Analog ground pin. — Digital ground pin. FEDL2240DIGEST-02 ML2240 Family 6/24 ...
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... Condition Range — 2.7 to 3.6 — –40 to +85 Min. Typ. — 3.5 4.096 Condition Range — 4.5 to 5.5 — –40 to +85 Min. Typ. — 3.5 4.096 FEDL2240DIGEST-02 ML2240 Family (GND = 0 V) Unit V +0.3 V °C (GND = 0 V) Unit V °C Max. MHz 4.5 (GND = 0 V) Unit V °C Max. MHz 4.5 7/24 ...
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... MHz at no load OSC — OPTANA = “L” MHz at no load OSC — OPTANA = “H” –40 to +70°C — –40 to +85°C — FEDL2240DIGEST-02 ML2240 Family Typ. Max. Unit — — 0.14 × V — — — V — ...
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... MHz at no load OSC — OPTANA = “L” MHz at no load OSC — OPTANA = “H” –40 to +70°C — –40 to +85°C — FEDL2240DIGEST-02 ML2240 Family Typ. Max. Unit — — 0.2 × V — — — V — ...
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... No output load 0.5 — 4.5 to 5.5 V, DGND = AGND = –40 to +85° Condition Min. — output load 0.5 — 30 FEDL2240DIGEST-02 ML2240 Family Typ. Max. Unit — — kΩ — AV – 0 kΩ Typ. Max. Unit — — kΩ ...
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... OKI Semiconductor FUNCTIONAL DESCRIPTION Micro-computer Interface The micro-computer interface in the ML2240 has 2 types of interface circuits built in: Parallel interface and serial interface. The interface setting can be changed with the SERIAL pin. SERIAL pin = "H" level: Serial interface SERIAL pin = "L" level: Parallel interface Table below shows the SERIAL pin status in the serial and parallel interfaces. SERIAL = “ ...
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... In other states, the NCR signal outputs “H” level. Data Stable Output status signal Channel 4 BUSY output (BUSY4) Channel 3 BUSY output (BUSY3) Channel 2 BUSY output (BUSY2) Channel 1 BUSY output (BUSY1) Channel 4 NCR output (NCR4) Channel 3 NCR output (NCR3) Channel 2 NCR output (NCR2) Channel 1 NCR output (NCR1) FEDL2240DIGEST-02 ML2240 Family 12/24 ...
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... DI pin data is captured on the falling edge of SCK clock. Command and Data Input Timings • SCK Rising Edge Operation CS (I) WR (I) DI (I) SCK (I) • SCK falling Edge Operation CS (I) WR (I) DI (I) SCK ( FEDL2240DIGEST-02 ML2240 Family 13/24 ...
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... The status signals in the parallel interface are output pins sequentially from D7. Status Read Timing • SCK Rising Edge Operation CS (I) RD (I) SCK (I) Hi-Z DO (O) • SCK Falling Edge Operation CS (I) RD (I) SCK (I) Hi FEDL2240DIGEST-02 ML2240 Family Hi-Z Hi-Z 14/24 ...
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... Specifies the channel for which the sound volume set, and then sets the volume for that channel Sets the volume for the Left/Right of each channel FEDL2240DIGEST-02 ML2240 Family Description 15/24 ...
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... Meanwhile, after a command is input, the NCR and BUSY signals of all channels are at “L” level during the processing of the command. For Status output methods, see the Micro-computer Interface section. To master clock inside the device 1 MΩ approx. XT “L” Channel status NCR1 NCR2 NCR3 NCR4 FEDL2240DIGEST-02 ML2240 Family BUSY1 BUSY2 BUSY3 BUSY4 16/24 ...
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... OKI Semiconductor Voice Synthesis Algorithm The ML2240 contains 5 algorithm types to match the characteristic of playback voice: 2-bit ADPCM 2 algorithm, 4-bit ADPCM 2 algorithm, 8-bit PCM algorithm, 8-bit non-linear PCM algorithm, and 16-bit PCM algorithm. Key feature of each algorithm is described in the table below. Voice synthesis algorithm ...
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... Playback time = 16 (kHz) × 4 (bit) The above equation gives the playback time when the phrase control table function is not used. (Bit length is ADPCM, ADPCM bits; PCM = 8 bits.) ≅ 131 (sec) FEDL2240DIGEST-02 ML2240 Family 18/24 ...
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... OKI Semiconductor Mixing Function The ML2240 can perform simultaneous mixing of 4 channels possible to specify PLAY and STOP for each channel separately. • Precautions for Waveform Clamp at the Time of Channels Mixing When mixing of channels is done, the clamp occurrence possibility increases from the mixing calculation point of view known beforehand that the clamp will occur, then adjust the sound volume by VOL command. • ...
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... Example 1: Phrases Using the Phrase Control Table Function Phrase 1 A Phrase 2 A Phrase 3 E Phrase 4 E Phrase 5 A Example 2: Example of ROM Data in case Example 1 Converted to ROM Silence Address control area Editing area FEDL2240DIGEST-02 ML2240 Family 20/24 ...
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... RD 8 D7-0 SERIAL BYTE RCS OPTANA TEST 30pF XT 4.096MHz XT 30pF 74HC139 Y3 Y2 RA19 2B Y1 RA18 RA17-0 A18-1 RD15/A-1 A0 RD7-0 D7 ROE AOUTL Speaker driver AOUTR Speaker driver FEDL2240DIGEST-02 ML2240 Family A18-1 A18-1 A18 D7-0 D7-0 D7 Speaker Speaker 21/24 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). FEDL2240DIGEST-02 ML2240 Family (Unit: mm) Package material Epoxy resin Lead frame material ...
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... OKI Semiconductor REVISION HISTORY Document No. Date FEDL2240DIGEST-01 Oct. 17, 2003 FEDL2240DIGEST-02 Jul. 12, 2004 Page Previous Current Edition Edition Final edition Corrected first byte of Play command. FEDL2240DIGEST-02 ML2240 Family Description 23/24 ...
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... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. FEDL2240DIGEST-02 ML2240 Family Copyright 2004 Oki Electric Industry Co., Ltd. 24/24 ...