msm7718-01 Oki Semiconductor, msm7718-01 Datasheet
msm7718-01
Related parts for msm7718-01
msm7718-01 Summary of contents
Page 1
... DTMF tone and call progress tone detection • Serial MCU interface control • Built-in VOX control Transmit side : Receive side : • Built-in 2100 Hz tone detection (bidirectional) • Package: 100-pin plastic TQFP (TQFP100-1414-0.50-K) (Product name : MSM7718-01TS ITU-T Recommendations G.726 (32 kbps) -law 23 ms (max.) Typically ...
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... Tone Generator (DTMF etc.) ATTtgtx Tone Detector (DTMF etc.) SoutL RinL 2100 Hz Detect m/L Mute L/m ADPCM TRANSCODER ADPCM CODER ADPCM DECODER Timing P/S&S/P Clock Gen. Gen. MSM7718-01 ATTrx Power Noise Detect Gen. VOXI MLV0 MLV1 MLV2 MUTE D7-0 A20-0 Flash WE Memory OE Controller CS1 ...
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... AOUT– 16 AOUT+ 17 SGT 18 SGR AIN1– 22 GSX1 23 AIN1 NC: No-connect pin 100-Pin Plastic TQFP MSM7718- CS2 73 INT 72 TSTO 71 VOXO 70 VOXI 69 MLV0 68 MLV1 67 MLV2 66 MUTE 65 DG2 ...
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... Transmit Gain: V GSX2 = (R2/R1) ¥ (R4/R3) Receive Gain VFRO = 2 ¥ (R5/R6) Z =120 nF + 350 W L AIN1– AIN1 GSX1 SGT AIN2 GSX2 /Vi VFRO R6 PWI R5 AOUT– Differential V Analog O Output AOUT+ Figure 1 Analog Interface MSM7718-01 – VREF + – to ENCODER + from DECODER – + –1 4/38 ...
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... Since the PDWN pin is ORed with CR0-B6 of the control register, set CR0-B6 to logic “0” when using this pin. MCK Master clock input. The frequency must be 9.6 MHz or 19.2 MHz. The master clock signal is allowed to be asynchronous with SYNCP, SYNCA, BCLKP, and BCLKA. MSM7718-01 5/38 ...
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... Refer to Figs. 2-4.) This pin high impedance state except during 8-bit PCM output. (It is also in a high impedance state during power-down mode.) A pull-up resistor must be connected to this pin because its output is configured as an open drain. MSM7718-01 6/38 ...
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... The PCM signals (PCMADI and PCMADO) of the ADPCM transcoder can be assigned to time slot The PCM signals (PCMLNI, PCMLNO, PCMACI, PCMACO) of the line echo canceler can be assigned to one of the time slots (Multiple timing is controlled by CR1 and CR2.) time slot 2 time slot 3 Figure 2 PCM Multiple Timing MSM7718-01 time slot 7 7/38 ...
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... PCM CODEC is always assigned to time slot 1). Turn on the line echo canceler and establish a route between the slave telephone and the line. Figure 3 PCM Signal Connection Example 1 MSM7718-01 ADPCM Slave telephone Transcoder 8/38 ...
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... Put the line echo canceler into “through mode”, and establish the route between the line and the microphone/speaker of the master telephone. Various routing can be implemented providing extension of external PCM CODECs. Figure 4 PCM Signal Connection Example 2 Line Echo Canceler MSM7718-01 ADPCM Slave telephone CODEC 9/38 ...
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... Input/output timing is shown in Fig. 5. INT goes to logic “0” when any change has been found in the tone detection results in the tone detection mode (change in the control register bits CR7-B3, B2), and goes to logic “1” when the data of control register CR7 is read out. MSM7718-01 10/38 ...
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... The background noise amplitude is set by the control register CR6. Because this signal is ORed with the register data CR6-B3, set the control register data CR6-B3 to logic “0” High Impedance (a) Data Write Timing (b) Data Read Timing MSM7718- 11/38 ...
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... For the control method, refer to the control register description (CR1). Since these pins are ORed with CR1-B2, B1, and B0 internally, set the bits of the register to “0“ before using this pin. Silence Voice T VXOFF Silence Detect (Hangover time) Silence Voice Background Noise Figure 6 VOX Function MSM7718-01 Voice Voice 12/38 ...
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... Normally fix these pins to logic “0”. TSTI4 Input for mode select. Fix this pin to logic “0” for normal speech mode. Fix this pin to logic “1” for line echo canceler expansion mode. Refer to the explanation of CR0 for the operation mode. TSTO Output for test. MSM7718-01 13/38 ...
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... RS BCLKA to SYNCA SYNCP to BCLKP SYNCA to BCLKA t SYNCP to BCLKP, SYNCA to BCLKA RO t SYNCP, SYNCA WS t — — DH MSM7718-01 Rating Unit –0 – 0 0.3 DD –0 0.3 DD –55 to +150 ° –25°C to +70°C) DD Max. Min. Typ. Unit 3.6 2.7 — ...
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... GSX1, GSX2, VFRO O1 (R =20kW) L AOUT+ (R =1.2 kW AOUT– (R =1.2 kW VFRO OFGX VFRO OFGX SGT, SGR SG SGT SGT SGR SGR PP MSM7718- 2.7 to 3.6 V, Ta= –25 to +70°C) DD Min. Typ. Max. Unit — — 0 — — — — 0.5 0.5¥ ...
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... RD1 Values in parentheses apply when RD2 Cload = 10 pF, pull-up resistance :£2 kW RD3 Cload=100 pF EXCK XD3 LSB MSM7718- 2.7 to 3.6 V, Ta= –25 to +70°C) DD Min. Typ. Max. Unit 0 — 200 (100 — 200 (100 — 200 (100) ...
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... Serial Port Timing for Microcontroller Interface DEN t M2 EXCK DIN W/R A4 DOUT LSB MSM7718- LSB t M12 t M10 M11 B1 B0 17/38 ...
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... AIN=SG (*2) — (*3) (*2) GSX2 1020 0 VFRO Noise Freq.: Noise Level: — kHz 50 mVpp MSM7718-01 = 2 –25 to +70°C) Min. Typ. Max. Unit 25 — — –0.15 — — +0.2 Reference dB –0.15 — +0.8 0 — 0.8 13 — ...
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... Condition For all gain set values Condition VOXO pin:see Fig.6 SilenceÆvoice VXON Voice/silence VoiceÆsilence differential:10 dB VXOFF For detection level set values CRM6-B6,B5 MSM7718- 2 –25 to +70°C) DD Min. Typ. Max. Unit –1.5 — +1.5 % –1.5 — +1.5 % –10 –8 – ...
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... CPT not detected rejan — t dlyan — t holan t detXX t dlyXX The state of the INT pin is changed by reading the contents of CR7 retained when CR7 is not read. MSM7718- 2 –25 to +70°C) DD Min. Typ. Max. Unit 350 — 640 Hz 700 — — Hz — ...
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... SP6 SP5 SP4 SP3 SP14 SP13 SP12 SP11 — — SP20 SP19 D6/CA6 D5/CA5 D4/CA4 D3/CA3 D2/CA2 D1/CA1 D0/CA0 D TONE3/ WA6 WA5 WA4 WA3 MSM7718-01 R OPE OPE OPE MODE0 R/W MODE2 MODE1 MLV2 MLV1 MLV0 PCM AC PCM AC PCM AC SEL2 ...
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... In addition, 2100 Hz tone of PCMLNI and PCMACI (bidirectional) can be detected Reserved OPE PDN/RST — MODE3 Power-on 1: Power-down 0: Power-on 1: Power-down reset MSM7718- OPE OPE OPE MODE2 MODE1 MODE0 22/38 ...
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... DTMF tone by PMLNI input but also 2100 Hz tone by PCMLNI and PCMACI input (bidirectional). • The PCM CODEC does not operate in this mode. A capacitor is required between SGT and ground and between SGR and ground (see Application Circuit). MSM7718-01 23/38 ...
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... Reserved 1: Muting specified by bits B2, B1, and B0 is enabled. ( Through ( – ( – – – – – MUTE MSM7718- MLV2 MLV1 MLV0 Reset 24/38 ...
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... In this case, the outputs are all in high impedance state for all time slots PCM LN PCM LN PCM LN SEL2 SEL1 SEL0 Corresponding time slot None MSM7718- PCM AC PCM AC PCM AC SEL2 SEL1 SEL0 25/38 ...
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... MSM7718- GAIN2 GAIN1 GAIN0 Receive signal gain 0 0 – – – – – ...
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... B3 B2 – – – – – – – – MSM7718- TONE RX TONE RX TONE GAIN2 GAIN1 GAIN0 Tone generator gain 0 0 – – – –14 dB ...
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... MSM7718- TONE2 TONE1 TONE0 Description 0 0 852 Hz + 1209 Hz ( 852 Hz + 1336 Hz ( 852 Hz + 1477 Hz ( 852 Hz + 1633 Hz ( 941 Hz + 1209 Hz (*) ...
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... A6h Modulation sine wave *1 62.5 ms Subaddress 2 (Frequency 16Ch 16Dh 16Eh 16Fh 8 Hz wamble tone *1 Time 1 62.5 ms Transmit single tone MSM7718-01 Subaddress 3 Subaddress 4 (Time 1) (Time 170h 174h 171h 175h 172h 176h 173h 177h Time 2 62.5 ms ...
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... LVL1 LVL0 TIME OFF address "175h". (A=pad) (– (–1)/20) ) (see Figure 6) VXOFF Silence level DET INT 1 0 CPT MSM7718- RX. NOISE RX. NOISE RX. NOISE IN LEVEL SEL LVL1 LVL0 DET BUSY/ PRM/ DTMF DET21L ...
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... The gain controller adjusts the RIN level when it is –24 dBm0 or above, and it has the control range –8.5 dB. 1: Gain control ON 0: Gain control OFF 1: Detected 0: Not detected 1: Detected 0: Not detected LECCCLP LECHD (NLP)* MSM7718- LECHLD LECATT LECGC (ADP)*1 (ATT)*1 (GC)* OFF 31/38 ...
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... The gain controller starts controlling when the RIN level is –24 dBm0 or above and has the control range –8.5 dB. 1: Gain control ON 0: Gain control OFF AECCCLP — AECCLR AECHD (NLP)* MSM7718- AECHLD AECATT AECGC (ADP)*1 (ATT)*1 (GC)* OFF 32/38 ...
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... Writes the data of CR17 (D0 to D7) and CR16 (D8 to D15) in the lower byte of default storage memory. The address is specified CR11 and A8 to A15 of CR12. ( Reserved ( Reserved MEM ADPCM ADPCM CMD3 SEL MODE1 MODE0 MSM7718- CMD2 CMD1 CMD0 33/38 0 ...
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... SP13 SP12 SP11 — — — — — — SP20 SP19 — — — — MSM7718- ST2/ ST1/ ST0 — — — — ST10/ ST9/ ST8/ A10 A9 A8 — ...
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... TONE3/ WA5 WA4 WA3 — — MSM7718- D2/CA2 D1/CA1 D0/CA0 — — — — TONE2/ D TONE1/ D TONE0/ WA2 WA1 WA0 Frequency 0 0 697 Hz + 1477 Hz (3) ...
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... Figure 8-2 Memory Map for Default Value Store Memory Direct Access Default Value Store Memory write in upper byte Yes Figure 8-1 Flow Chart of Default Value Store Memory Direct Access Default Value Store Memory Address (CR11, CR12) MSM7718-01 Direct Access Set address. (1) CR12, CR11 Set write data. CR16, CR17 Set command to (2) CR10 ...
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... PCMACI R4 GSX2 PCMACO VFRO PCMADI R6 R5 PWI PCMADO AOUT– BLKP Z = 120 SYNCP 350 W AOUT+ A20-19 A18-0 D7 MCK PDN/RST RP PDWN EXCK Basic DEN DIN DOUT INT CS1 CS2 MSM7718-01 ADPCM IS Transmit Data ADPCM IR Receive Data ADPCM Control PCM Control 37/38 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM7718-01 (Unit : mm) Package material Epoxy resin ...