msm7557 Oki Semiconductor, msm7557 Datasheet - Page 18

• Manufacturer Part Number: msm7557
• Description: Single Chip Msk Modem With Compandor For Cordless Telephone
• Manufacturer: Oki Semiconductor

Full power down signal
Frame detection signal
¡ Semiconductor
Frame Detector
Frame detection pattern is defined by BIT and FPS.
Fig 3 shows detection timing
First, put digital "0" level to FDE pin more than 1 ms, then FD pin is reset to "0" level.
Next, put digital "1" level to FDE pin, then RT and RD output digital "1" level until frame synchronous
signal detected.
When synchronous pattern is detected, FD pin is held to digital "1" level.
At the full power down state (PDN = "1", RVE = "0"), FD pin becomes reset state.
In order to detect frame synchronous signal certainly, receive side PLL should be locked in
sufficiently.
When a modem starts data transmittion, the bit-synchronous signal of more than 18 bits should be
transmitted before frame pattern of the upper table.
(Internal signal)
Internal RD
Internal RT
M.T. = Master telephone
S.H. = Slave handset
BIT
0
0
1
1
FDE
FPS
0
1
0
1
Sync-pattern
AC4D6H
A9336H
C4D6H
9336H
CK
CK
D
D
Q
Q
Q
Q
Receiver
M.T.
M.T.
S.H.
S.H.
Frame synchronous
Frame synchronous
Bit + Frame synchronous
Bit + Frame synchronous
Note
MSM7557
18/25
FD
RT
RD