ak4183 AKM Semiconductor, Inc., ak4183 Datasheet - Page 13

• Manufacturer Part Number: ak4183
• Description: I 2 C Touch Screen Controller
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The selection of channel input of AK4183 is determined by a command byte. The timing of the driver switch on is 18
of SCL regardless PD0 bit when accelerate command (A2= “0”) is sent. The accelerate command is to accelerate the timing of
desired driver SW ON to ensure that AK4183 needs more settling time. As for actually sampling is on the time of READ operation,
it becomes possible to take settling time long even when the impedance of the touch screen is large.
A/D conversion is synchronized with SCL. Sampling time is the one SCL clock period (SCL7↓∼ SCL8↓) on the end of writing
address byte and then hold. A/D conversion is held on the next 12 SCL period (except MASTER ACK) .The readout sequence is
that after command byte has been sent, AK4183 respond with acknowledge if the address matches. The MSB data byte will follow
(D11∼D4) then issued acknowledge by master. The LSB data byte (D3∼D0, followed four “0”) will be followed by NOT
acknowledge bit (NACK) from master in order to terminate the read transfer. The master will then issued STOP that ends read
operation or Repeated Start condition that keeps write or read operation. The master will issue Repeated Start Condition or START
condition followed by read operation again. AK4183 repeats A/D data updated [continuous read operation]. Master must issue
STOP condition after terminating the last read out of A/D data.
MS0500-E-00
Touch Driver SW
Touch Driver SW
SDA
WRITE Operation Sequence (Figure 13)
READ Operation Sequence (Figure. 14)
SCL
SDA
A2=“0” or A2=“1” , PD0=“1”
A2=“0”, PD0=“0”
A2=“1”, PD0=“0”
SCL
START
0
START
A2=0, PD0=0 or 1
A2=1, PD0=1
A2=1, PD0=0
1
0
1
1
0
2
1
0
Address Byte
0
3
2
I
1
IV
4
0
Address Byte
3
0
5
1
0
4
6
“H”
CAD0
0
Figure 13 write operation and Driver SW timing
7
Sampling
5
R/ W
1
8
AK4183
0
ACK
6
0
9
CAD0
Figure 14 Read data Sequence
D11
7
10
II
R/ W
D10
11
0
8
AK4183
D9
ACK
Data Byte (MSB)
12
0
AD conversion
9
D8
13
V
13
S
10
D7
14
A2
D6
11
15
Command Byte
D5
16
A1
12
D4
17
MASTER
A0
13
III
ACK
18
0
X1
D3
14
19
D2
PD0
20
15
D1
MODE
21
Data Byte (LSB)
16
D0
22
X2
17
0
23
AK4183
ACK
0
0
18
24
VI
0
25
STOP
19
th
falling edge
0
IV
26
2006/04
MASTER
[AK4183]
NACK
1
27
Repeated START
STOP or
28