ak4184a AKM Semiconductor, Inc., ak4184a Datasheet - Page 27

• Manufacturer Part Number: ak4184a
• Description: Tsc With Keypad Scanner And Gpio Expander
• Manufacturer: AKM Semiconductor, Inc.

Addr
10H
■
The GPPU register determines the output pin type - either CMOS or Open drain. This register is valid for pins
configured as outputs (IO bit = “1” in
(IOVDD+0.3) V or lower voltage when the PUx bit is set to “1”.
■ GPIO Pin State Register (PAGE 1)
The GPSR register determines the state of pins which are either pull-down or Hi-Z. This register is valid for pins
configured as inputs (IO bit = “0”).
■ GPIO Pin Level Register (PAGE 0)
The state of each GPIO pin can be determined by reading this register (GPLR). Each bit corresponds to one pin. Use
the GPLR read-only registers to determine the current level of a certain pin irrespective of the programmed pin
direction. The upper eight bits returns zero when read.
MS0947-E-00
Addr
12H
Addr
13H
GPIO Pin Pull-up Register (PAGE 1 )
Name
GPLR
15:8
15:8
Bits
Bits
7:0
7:0
Name
GPPU
D15
Name
GPSR
0
Name
Name
GPD
PS
0
D14
15:8
Bits
0
7:0
D15
PU7
D15
PS7
GPIO Pin state select
Reserved
D13
Reserved
GPIO Pin Level bits for GPIO pins
0
D14
PU6
0: GPIO Pull-down (Rgp=1MΩ typ.) state (default)
1: GPIO pin Hi-Z state
0: Pin state is low
1: Pin state is high
Name
D14
PU
PS6
D12
0
D13
PU5
D13
PS5
Table 29. GPIO Pin Pull-up Register Format
D11
GPIO Pullup register select
Reserved
Table 33. GPIO Pin Level Register Format
Table
Table 31. GPIO Pin State Register Format
0
D12
PU4
0: GPIO CMOS outputs (default)
1: GPIO Open drain outputs
Table 34. GPIO Pin Level Register
Table 32. GPIO Pin state Register
Table 30. GPIO Pull-up Register
D12
PS4
D10
28). Pull-up resistors on GP0 to GP7 pins must be connected to
0
D11
PU3
D11
D9
PS3
0
D10
PU2
D8
0
- 27 -
D10
PS2
PU1
GPD7
D9
D7
Description
Description
Description
PS1
D9
PU0
D8
GPD6
D6
PS0
D8
D7
0
GPD5
D7
D5
0
D6
0
D6
0
GPD4
D5
D4
0
D5
0
D4
0
GPD3
D4
D3
0
D3
0
D3
0
GPD2
D2
D2
0
D2
0
[AK4184A]
2008/04
GPD1
D1
0
D1
D1
0
D0
D0
0
0
GPD0
D0