ak4115 AKM Semiconductor, Inc., ak4115 Datasheet - Page 56

• Manufacturer Part Number: ak4115
• Description: High Feature 192khz 24bit Digital Audio Interface Transceiver
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
Clock Control
TX Control
MS0573-E-00
Addr
Addr
0AH Clock Control
0BH TX Control
PSEL: Setting of PLL reference clock (See Table 1)
XSEL: Setting of X’tal oscillator (See Table 12)
WSYNC: Synchronization between the biphase signal and ELRCK
ASYNC: Setting of synchronous / asynchronous mode for DIT/DIR
MCK1E: Setting of MCKO1 output
MCK2E: Setting of MCKO2 output
TX1NE: Setting of TXN1 pin.
VTX: Setting of Validity bit for TX
CCRE: CCRC Enable at professional mode
CTRAN: Transfer mode of CR191-0 bits
EDIF1-0: Setting of audio interface mode in asynchronous mode. (See Table 30)
ECK1-0: Setting of EMCK input frequency (See Table 31)
MSEL: Master clock setting for TX in asynchronous mode (See Table 4)
Register Name
Register Name
Default
Default
R/W
R/W
0: Disable (Default)
1: Enable
0: Synchronous mode (Default)
1: Asynchronous mode
0: Disable. Output “L”.
1: Enable (Default)
0: Disable. Output “L”.
1: Enable (Default)
0: Disable. Output “L”. This mode is useful for consumer.
1: Enable (Default)
0: Valid (Default)
1: Invalid
0: CCRC data is not generated.
1: CCRC data is generated in professional mode. In consumer mode, CCRC data is not generated.
0: Not transfer or finish to transfer (Default)
1: Transfer
(Default)
All CR191-0 bits is transferred to CT191-0 bits when CTRAN bit changes “0” to “1”. The
transferred CT191-0 bits are valid after next block start signal is detected. CTRAN bit goes to
“0” after finishing the transfer.
TX1NE
MSEL
R/W
RD
D7
D7
1
0
ECKS1 ECKS0
RD
RD
D6
D6
0
0
0
- 56 -
MCK1E MCK1E ASYNC
R/W
R/W
D5
D5
1
1
EDIF1
R/W
R/W
D4
D4
1
1
EDIF0
R/W
R/W
D3
D3
0
0
WSYNC
CTRAN
R/W
R/W
D2
D2
0
0
CCRE
XSEL
R/W
R/W
D1
D1
0
1
PSEL
VTX
[AK4115]
R/W
R/W
D0
D0
2006/12
0
0