ia186em Innovasic Semiconductor Inc., ia186em Datasheet - Page 92

• Manufacturer Part Number: ia186em
• Description: 8-bit/16-bit Microcontrollers
• Manufacturer: Innovasic Semiconductor Inc.

IA186EM/IA188EM
8-Bit/16-Bit Microcontrollers
5.1.46 PRIMSK (02ah) (Master and Slave Mode)
PRIority MaSK Register. This register contains a value that sets the minimum priority level at
which an interrupt can be generated by a maskable interrupt. The PRIMSK register contains
0007h on reset (see Table 68).
Table 68. Priority Mask Register
5.1.47 IMASK (028h) (Master Mode)
Interrupt MASK Register. The interrupt mask register is read/write. Setting a bit in this register
has the same effect as setting the MSK bit in the corresponding interrupt control register. Setting
15
14
Bits [3–2]—D1–D0 DMA Channel Interrupt In Service → The respective DMA channel
is being serviced when this bit is set to 1.
Bit [1]—Reserved.
Bit [0]—TMR0 Timer Interrupt In Service → Timer 0 is being serviced when this bit is
set to 1.
Bits [15–3]—Reserved → Set to 0.
Bits [2–0]—PRM2–PRM0 Priority Field Mask → This three-bit field sets the minimum
priority necessary for a maskable interrupt to generate an interrupt. Any maskable
interrupt with a numerically higher value than that contained by these three bits is
masked. The values of PR2–PR0 are shown below.
Values of PR2–PR0 by Priority
Any unmasked interrupt can generate an interrupt if the priority level is set to 7. On the
other hand, if the priority level is set to say 4, only unmasked interrupts with a priority of
0 to 5 are permitted to generate interrupts.
Priority
(High) 0
(Low) 7
13
1
2
3
4
5
6
12
PR2–PR0
11
®
000b
001b
010b
011b
100b
101b
110b
111b
Reserved
10
9
8
7
UNCONTROLLED WHEN PRINTED OR COPIED
6
5
Page 92 of 145
IA211050831-16
4
3
PRM2–PRM0
2
1
0
December 24, 2008
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