hsp50415 Intersil Corporation, hsp50415 Datasheet - Page 14
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hsp50415
Manufacturer Part Number
hsp50415
Description
Wideband Programmable Modulator Wpm
Manufacturer
Intersil Corporation
Datasheet
1.HSP50415.pdf
(29 pages)
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I/Q Gain Imbalance Correction Stage
Following the X/SIN(X) filter pair is a gain stage where I and
Q are scaled independently. The programmable gain
consists of a 10-bit scale factor and a 10-bit DC offset. The
equation for the gain is as follows:
dataOut<15:0> = (dataIn<15:0> * (1.0 +/-
0.00SSSSSSSSSS)) +/- 0.00DDDDDDDDDD
Where SSSSSSSSSS denotes the 10-bit scale factor and
DDDDDDDDDD is the 10-bit DC offset value. The scale
factor may be optionally added or subtracted from 1.0 and
the DC offset may optionally be added or subtracted to the
result of the scale operation.
For a gain of 1.0 through this stage, program the scale factor
to 0x000 and the DC offset to 0x000 for both the I and Q
values. The output is rounded to either 14-bits or 12-bits.
The rounding options are programmable as shown in
Table 4.
TABLE 4. IQ GAIN CORRECTION STAGE ROUNDING OPTIONS
If saturation does occur, the output is symmetrically limited.
Digital to Analog (D/A) Converters
The HSP50415 outputs using dual 12-bit, 150MSPS, high
speed, low power, D/A converters. The converter provides
20mA of full scale output current and includes edge-
triggered CMOS input data latches. Low glitch energy and
excellent frequency domain performance is achieved by the
DACs segmented current source architecture.
RNDBITS<1:0>
-1
-2
-3
-4
4
3
2
1
0
0
00
01
10
11
FIGURE 18. X/SIN(X) FILTER RESPONSE
0.05
0.1
No rounding performed, data is truncated
Round to 14-bits
Round to 12-bits
Round in both positions
0.15
NORMALIZED FREQUENCY
0.2
14
ROUND SELECTION
0.25
0.3
0.35
SINC
ISF
0.4
0.45
0.5
HSP50415
Voltage Reference
The internal voltage reference of the device has a nominal
value of + 1.2V with a ± 10ppm /
temperature range of the converter. It is recommended that a
0.1μF capacitor be placed as close as possible to the REFIO
pin, connected to the analog ground. The REFLO pin selects
the reference. The internal reference can be selected if
REFLO is tied low (ground). If an external reference is
desired, then REFLO should be tied high (the analog supply
voltage) and the external reference driven into REFIO. The full
scale output current of the converter is a function of the
voltage reference used and the value of R
be within the 2mA to 20mA range, though operation below
2mA is possible, with performance degradation.
V
offset voltage. If the internal reference is used, V
equal approximately 1.2V on the FSADJ. If an external
reference is used, V
The calculation for I
I
If the full scale output current is set to 20mA by using the
internal voltage reference (1.2V) and a 1.91kΩ R
then the input coding to output current is shown in Table 5.
Outputs
The 5 MSBs for each DAC on the HSP50415 drive a
thermometer decoder, which is a digital decoder that has a
5-bit binary coded input word with 2
where the number of output bits that are active correlate
directly to the input binary word. The HSP50415 uses a
thermometer decoder to significantly minimize the output
glitch energy for each DAC. I/QOUTA and I/QOUTB are
complementary current outputs. The sum of the two currents
is always equal to the full scale output current minus one
LSB. If single ended use is desired, a load resistor can be
used to convert the output current to a voltage. It is
recommended that the unused output be either grounded or
equally terminated. The voltage developed at the output
must not violate the output voltage compliance range of -
0.3V to 1.25V. R
output) should be chosen so that the desired output voltage
is produced in conjunction with the output full scale current.
If a known line impedance is to be driven, then the output
load resistor should be chosen to match this impedance.
The output voltage equation is:
V
OUT
INPUT CODE <D11-D0>
FSADJ
OUT
10 00000 00000
00 00000 00000
(Full Scale) = (V
11 11111 11111
= I
TABLE 5. INPUT CODING vs OUTPUT CURRENT
and V
OUT
X R
REFIO
LOAD
LOAD
OUT
FSADJ
will be equivalent except for a small
FSADJ
(the impedance loading each current
.
(Full Scale) is:
I/QOUTA (mA)
will equal the external reference.
/R
SET
o
20
10
C drift coefficient over the full
0
) X 32.
5
-1 (or 31) output bits,
SET
I/QOUTB (mA)
. I
OUT
SET
FSADJ
10
20
0
April 23, 2007
should
resistor,
FN4559.6
will