sla6860m Allegro MicroSystems, Inc., sla6860m Datasheet - Page 2

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sla6860m

Manufacturer Part Number
sla6860m
Description
High Voltage Sla6860m And Sma6860m Series Driver Ics For 3-phase Dc Motor Applications
Manufacturer
Allegro MicroSystems, Inc.
Datasheet
▪ Power MOSFETs incorporating fast recovery diodes (FRD)
▪ Use of SIP 24-pin power package, proven in other high-
Functional Description
The functional block diagram for one of the three device phases
is shown in figure 2. High voltage power and 15 VDC are input
between VBB and LS1/LS2, between VCC1 and COM1, and
between VCC2 and COM2. The on/off signals of the power
MOSFETs are operated by six signals: HIN1, HIN2, HIN3,
LIN1, LIN2, and LIN3. These input signals are positive logic (the
provide low losses in comparison with IGBT technology
volume Sanken product lines, with L-bend and zigzag
leadforms available; L-bends formed with precautions to
ensure device integrity; zigzags for stable mounting; heatsink
tab option
COM2
COM1
VCC 2
VCC1
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
SD2
OCL
SD1
RC
Figure 2. SLA6860M/SMA6860M Series Phase Block Diagram. These devices
support high-side and low-side three-phase MOSFET output drivers.
Input
Logic
UVLO
UVLO
(OCP Reset )
Input Logic
Shutdown
Thermal
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
VB1
UVLO
Allegro MicroSystems, Inc.
OCP
Level Shift Driver
115 Northeast Cutoff
High-Side
VB2
UVLO
OCP and OCL
Low-Side
MOSFET turns on at V
nected between VB1 and U, VB2 and V, and VB3 and W1, as the
high voltage power source.
The protection functions, including overcurrent protection
(enable at detected short circuit, and so forth), overtemperature
protection (at abnormal ambient temperature, overload, and so
forth), and undervoltage of low control power supply voltage
(at instantaneous fall, and so forth) are built-in and when any of
these functions is operated, it can be monitored at the correspond-
ing output terminal.
The current limiter (OCL) signal is provided as a control signal,
and when the current flowing across the shunt resistor exceeds
the typical limit value, the OCL terminal turns on. Current limit-
ing can be enabled by connecting this signal to the SD1 terminal
(for high-side limiting) or to the SD2 terminal (for low-side
limiting).
Driver
VB3
UVLO
xINx
= high). The boot capacitors are con-
VBB
W1
W2
LS
LS
V
U
1
2
2

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