micrf506 Micrel Semiconductor, micrf506 Datasheet - Page 15
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micrf506
Manufacturer Part Number
micrf506
Description
410mhz And 450mhz Ism Band Transceiver
Manufacturer
Micrel Semiconductor
Datasheet
1.MICRF506.pdf
(28 pages)
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Charge Pump
The charge pump current can be set to either 125µA
or 500µA by CP_HI (‘1’ D 500µA). This will affect the
loop filter component values, see “PLL Filter”
section. In most cases, the lowest current is best
suited. For applications using phase detector
frequency and high PLL bandwidth, the 500µA can
be a better choice.
PLL Filter
The design of the PLL filter will strongly affect the
performance of the frequency synthesizer. The PLL
filter is kept externally for flexibility. Input parameters
when designing the loop filter for the MICRF506 are
mainly the modulation method and the bit rate.
These choices will also affect the switching time and
phase noise.
The frequency modulation can be done in two
different ways with the MICRF506, either by VCO
modulation or by modulation with the internal
dividers (see chapter Frequency modulation for
further details). In the first case, the PLL needs to
lock on a new carrier frequency for every new data
bit. Now the PLL bandwidth needs to be adequately
high. It may be necessary to use a third order filter to
suppress the phase detector frequency, as this is
not suppressed as much as when doing modulation
on the VCO.
A schematic for a second and third order loop filter is
shown in Figure 8. Schematic for open loop
modulation is shown in Figure 9.
PIN 27, CP_OUT
Micrel
September 2004
0000011
A6..A0
Figure 9. Loop filter for open loop modulation
Figure 8. Second and Third Order Loop Filter
CP_OUT
Pin 27
CP_HI
D7
D6
‘0’
C1
D5
‘0’
C1
D4
‘0’
R1
R1
C2
C2
OUTS3
D3
R2
OUTS2
D2
C3
C3
OUTS1
D1
VARIN
Pin 29
PIN 29, VAR_IN
OUTS1
D0
15
VCO
VCO
Divider
Open-loop
0000000
0000001
A6..A0
A6..A0
Table 9 shows three different loop filters, the two first
for VCO modulation and the last one for modulation
using the internal dividers. The component values
are calculated with RF frequency = 434MHz, VCO
gain = 32MHz/V and charge pump current = 125µA.
Other settings are shown in the table. The varactor
pin capacitance (pin 29) of 6pF does not influence
on the component values for the two filters with
lowest bandwidth. For the 12kHz bandwidth filter, a
third order loop filter is calculated. The third pole is
set by R2xC3. Here C3 is chosen to be 6pF, the
same as the varactor input pin capacitance (pin 29).
C3 can therefore be skipped.
Lock Detect
Modes of Operation
Mode1
A lock detector can be enabled by setting LD_en
= 1. When pin LD is high, it indicates that the
PLL is in lock.
0
0
1
1
(kbaud/sec)
Baud Rate
Modulation1
LNA_by
>38.4
>125
<200
Table 9. Loop Filter Components Values
<20
D7
D7
Mode0
0
1
0
1
PA2
(kHz)
D6
PLL
BW
Modulation0
0.6
10
3
5
D6
Power down
Margin(˚)
PA1
D5
Transmit
Standby
Phase
Receive
State
56
56
70
56
D5
‘0’
PA0
D4
Detector
Phase
Freq.
(kHz)
D4
‘0’
100
100
500
100
Sync_en
Comments
Keeps register configuration
Only crystal oscillator running
Full receive
Full transmit ex PA state
D3
RSSI_en
D3
680pF
150pF
150pF
10nF
C1
Mode1
D2
100nF 6.2k_
6.8nF
1.5nF
LD_en
10nF
(408) 955-1690
M9999-092904
D2
C2
MICRF506
Mode0
22k_
18k_
36k_
PF_FC1
R1
D1
D1
82k_
NC
R2
0
0
Load_en
PF_FC0
D0
D0
100nF
4.7pF
NC
NC
C3