as7c251mft18a ETC-unknow, as7c251mft18a Datasheet - Page 6

no-image

as7c251mft18a

Manufacturer Part Number
as7c251mft18a
Description
2.5v 1m X 18 Flowthrough Burst Synchronous Sram
Manufacturer
ETC-unknow
Datasheet
Write enable truth table (per byte)
Key: X = don’t care; L = low; H = high; B
Asynchronous Truth Table
Notes:
1. X means “Don’t Care”
2. ZZ pin is pulled down internally
3. For write cycles that follows read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur.
4. Snooze mode means power down state of which stand-by current does not depend on cycle times
5. Deselected means power down state of which stand-by current depends on cycle times
Burst sequence table
Snooze mode
Read
Write
Deselected
1
2
3
4
12/24/04, v. 1.2
Write all bytes (a, b)
st
nd
rd
th
Address
Address
Address
Address
Write byte b
Write byte a
Operation
Function
Read
Interleaved burst address (LBO = 1)
A1 A0
0 0
0 1
1 0
1 1
ZZ
H
L
L
L
L
A1 A0
GWE
0 1
0 0
1 1
1 0
H
H
H
H
H
L
WE, BWn
OE
X
H
X
X
A1 A0
L
1 0
1 1
0 0
0 1
= internal write signal
Alliance Semiconductor
Din, High-Z
A1 A0
I/O Status
1 1
1 0
0 1
0 0
BWE
High-Z
High-Z
High-Z
Dout
X
H
L
L
L
L
1
2
3
4
st
nd
rd
th
Address
Address
Address
Address
®
Linear burst address (LBO = 0)
BWa
X
H
X
H
L
L
A1 A0
0 0
0 1
1 0
1 1
A1 A0
BWb
0 1
1 0
1 1
1 0
X
H
X
H
L
L
A1 A0
1 0
1 1
0 0
0 1
AS7C251MFT18A
A1 A0
1 1
0 0
0 1
1 0
6 of 19

Related parts for as7c251mft18a