as7c331mntf32a Alliance Memory, Inc, as7c331mntf32a Datasheet - Page 15

no-image

as7c331mntf32a

Manufacturer Part Number
as7c331mntf32a
Description
3.3v 32/36 Flowthrough Sram With
Manufacturer
Alliance Memory, Inc
Datasheet
AC test conditions
Notes
1) For test conditions, see “AC test conditions”, Figures A, B, and C
2) This parameter measured with output load condition in Figure C.
3) This parameter is sampled, but not 100% tested.
4) t
5) t
6) This is a synchronous device. All addresses must meet the specified setup and hold times for all rising edges of CLK. All other synchronous inputs must
7) Write refers to
8) Chip select refers to
meet the setup and hold times with stable logic levels for all rising edges of CLK when chip is enabled.
12/23/04, v 1.2
HZOE
CH
• Output load: For t
• Input pulse level: GND to 3V. See Figure A.
• Input rise and fall time (measured at 0.3V and 2.7V): 2 ns. See Figure A.
• Input and output timing reference levels: 1.5V.
+3.0V
GND
is measured high above V
Figure A: Input waveform
10%
is less than t
90%
R/W and BW[a,b,c,d]
LZOE
CE0, CE1, and CE2
, and t
LZC
, t
90%
IH
HZC
LZOE
, and t
10%
.
is less than t
, t
CL
.
HZOE
D
is measured low below V
OUT
, and t
LZC
at any given temperature and voltage.
Figure B: Output load (A)
HZC
, see Figure C. For all others, see Figure B.
Alliance Semiconductor
IL
30 pF*
50Ω
V
L
for 3.3V I/O;
= V
for 2.5V I/O
®
= 1.5V
DDQ
/2
353Ω/1538Ω
D
OUT
Figure C: Output load(B)
AS7C331MNTF32A/36A
Thevenin equivalent:
5 pF*
319Ω/1667Ω
GND
+3.3V for 3.3V I/O;
/+2.5V for 2.5V I/O
*including scope
and jig capacitance
P. 15 of 18

Related parts for as7c331mntf32a