f25l004a Elite Semiconductor Memory Technology Inc., f25l004a Datasheet - Page 4

• Manufacturer Part Number: f25l004a
• Description: 3v Only 4 Mbit Serial Flash Memory
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
Block Protection (BP2, BP1, BP0)
The Block-Protection (BP2, BP1, BP0) bits define the size of the
memory area, as defined in Table2 to be software protected
against any memory Write (Program or Erase) operations. The
Write-Status-Register (WRSR) instruction is used to program the
BP2, BP1, BP0 bits as long as
Block-Protection-Look (BPL) bit is 0. Chip-Erase can only be
executed if Block-Protection bits are all 0. After power-up, BP2,
BP1 and BP0 are set to1.
FUNTIONAL BLOCK DIAGRAM
Elite Semiconductor Memory Technology Inc.
Protection Level
All Blocks
All Blocks
All Blocks
All Blocks
Upper 1/8
Upper 1/4
Upper 1/2
0
Address
Latches
Buffers
and
Table2 : F25L004A Block Protection Table
CE
BP2
0
0
0
0
1
1
1
1
Status Register Bit
SCK
Control Logic
WP
X-Decoder
Serial Interface
BP1
is high or the
0
0
1
1
0
0
1
1
SI
SO
BP0
0
1
0
1
0
1
0
1
WP
Data Latches
Block Protection Lock-Down (BPL)
-Lock-Down (BPL) bit. When BPL is set to 1, it prevents any
further alteration of the BPL, BP2, BP1, and BP0 bits. When the
value is “Don’t Care”. After power-up, the BPL bit is reset to 0.
Block Range
Y-Decoder
I/O Butters
WP
WP pin is driven high (V
HOLD
Block 4~7
Block 0~7
Block 6~7
Block 0~7
Block 0~7
Block 0~7
Flash
Block 7
and
None
pin driven low (V
Protected Memory Area
40000H – 7FFFFH
00000H – 7FFFFH
00000H – 7FFFFH
70000H – 7FFFFH
60000H – 7FFFFH
00000H – 7FFFFH
00000H – 7FFFFH
Publication Date: Jan. 2009
Revision: 1.6
Address Range
IH
IL
), the BPL bit has no effect and its
), enables the Block-Protection
None
F25L004A
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