hn58c256a Renesas Electronics Corporation., hn58c256a Datasheet - Page 21

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hn58c256a

Manufacturer Part Number
hn58c256a
Description
256k Eeprom 32-kword ? 8-bit Ready/busy And Res Function Hn58c257a
Manufacturer
Renesas Electronics Corporation.
Datasheet

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HN58C256A Series, HN58C257A Series
2. Data Protection at V
Note: The EEPROM shoud be kept in unprogrammable state during V
CE
OE
WE
×: Don’t care.
V
V
Rev.6.00, Oct. 26.2006, page 19 of 24
CC
SS
: Pull-down to V
: Pull-up to V
When V
as a trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional
programming, the EEPROM must be kept in an unprogrammable state while the CPU is in an unstable
state.
2.1 Protection by CE, OE, WE
2.2 Protection by RES (only the HN58C257A series)
signal.
To realize the unprogrammable state, the input level of control pins must be held as shown in the
table below.
The unprogrammable state can be realized by that the CPU’s reset signal inputs directly to the
EEPROM’s RES pin. RES should be kept V
The EEPROM breaks off programming operation when RES becomes low, programming operation
doesn’t finish correctly in case that RES falls low during programming operation. RES should be
kept high for 10 ms after the last data input.
CC
is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act
CC
WE
or CE
RES
level.
V
SS
CC
level.
CC
CPU
RESET
V
On/Off
V
×
×
CC
CC
*
Unprogrammable
1 µs min
Program inhibit
100 µs min
SS
×
V
×
level during V
SS
10 ms min
*
Unprogrammable
CC
CC
on/off.
Program inhibit
on/off by using CPU RESET
×
×
V
CC

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