gal20v8b-15qj Lattice Semiconductor Corp., gal20v8b-15qj Datasheet - Page 9

• Manufacturer Part Number: gal20v8b-15qj
• Description: High Performance E2 Cmos Pld Generic Array Logic? Gal20v8 Gal
• Manufacturer: Lattice Semiconductor Corp.

In the Simple mode, pins are configured as dedicated inputs or as
dedicated, always active, combinatorial outputs.
Architecture configurations available in this mode are similar to the
common 14L8 and 16P6 devices with many permutations of ge-
neric output polarity or input choices.
All outputs in the simple mode have a maximum of eight product
terms that can control the logic. In addition, each output has pro-
grammable polarity.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
Simple Mode
XOR
XOR
Vcc
Vcc
9
Pins 1 and 13 are always available as data inputs into the AND
array. The “center” two macrocells (pins 18 and 19) cannot be used
in the input configuration.
The JEDEC fuse numbers including the UES fuses and PTD fuses
are shown on the logic diagram on the following page.
Combinatorial Output with Feedback Configuration
for Simple Mode
Combinatorial Output Configuration for Simple Mode
Dedicated Input Configuration for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- All OLMC except pins 18 & 19 can be configured to
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- Pins 18 & 19 are permanently configured to this
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this configuration.
- All OLMC except pins 18 & 19 can be configured to
this function.
function.
this function.
Specifications GAL20V8