isplsi2096v-80lq128 Lattice Semiconductor Corp., isplsi2096v-80lq128 Datasheet - Page 8

• Manufacturer Part Number: isplsi2096v-80lq128
• Description: 3.3v High Density Programmable Logic
• Manufacturer: Lattice Semiconductor Corp.

Power consumption in the ispLSI 2096V device depends
on two primary factors: the speed at which the device is
operating and the number of Product Terms used.
Figure 3. Typical Device Power Consumption vs fmax
I CC can be estimated for the ispLSI 2096V using the following equation:
I CC (mA) = 20.2 + (# of PTs * 0.611) + (# of nets * Max freq * 0.0063)
Where:
The I CC estimate is based on typical conditions (V CC = 3.3V, room temperature) and an assumption of two
GLB loads on average exists. These values are for estimates only. Since the value of I CC is sensitive to
operating conditions and the program in the device, the actual I CC should be verified.
When Lattice 3.3V 2000V devices are used in mixed 5V/
3.3V applications, some consideration needs to be given
to the power-up sequence. When the I/O pins on the
3.3V ispLSI devices are driven directly by 5V devices, a
low impedance path can exist on the 3.3V device be-
tween its I/O and Vcc pins when the 3.3V supply is not
present. This low impedance path can cause current to
flow from the 5V device into the 3.3V ispLSI device. The
maximum current occurs when the signals on the I/O pins
are driven high by the 5V devices. If a large enough
current flows through the 3.3V I/O pins, latch-up can
occur and permanent device damage may result.
Power Consumption
Power-up Considerations
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
200
180
160
140
120
Notes: Configuration of six 16-bit counters
0
Typical current at 3.3V, 25 C
20
f
max (MHz)
40
ispLSI 2096V
60
8
Figure 3 shows the relationship between power and
operating speed.
This latch-up condition occurs only during the power-up
sequence when the 5V supply comes up before the 3.3V
supply. The Lattice 3.3V ispLSI devices are guaranteed
to withstand 5V interface signals within the device oper-
ating Vcc range of 3.0V to 3.6V.
The recommended power-up options are as follows:
Option 1: Ensure that the 3.3V supply is powered-up and
stable before the 5V supply is powered up.
Option 2: Ensure that the 5V device outputs are driven to
a high impedance or logic low state during power-up.
80
Specifications ispLSI 2096V
100
0127/2096V