ht82k68a Holtek Semiconductor Inc., ht82k68a Datasheet - Page 12

• Manufacturer Part Number: ht82k68a
• Description: Ht82k68a -- Multimedia Keyboard Encoder 8-bit Mask Mcu
• Manufacturer: Holtek Semiconductor Inc.

other circuits to remain in their original state. Some reg-
isters remain unchanged during other reset conditions.
Most registers are reset to the initial condition when
the reset conditions are met. By examining the PDF and
TO flags, the program can distinguish between different
Note: u means unchanged
Rev. 1.70
chip resets .
TO
0
u
0
1
1
Label
TON
TM0
TM1
PDF
0
u
1
u
1
RESET reset during power-up
RESET reset during normal operation
RESET wake-up HALT
WDT time-out during normal operation
WDT wake-up HALT
Reset Configuration
Reset Timing Chart
Reset Circuit
0~3, 5
Bits
4
6
7
RESET Conditions
Unused bit, read as "0"
To enable/disable timer counting (0= disabled; 1= enabled)
10= Timer mode (internal clock)
TMRC (0EH) Register
12
To guarantee that the system oscillator has started and
stabilized, the SST (System Start-up Timer) provides an
extra-delay of 1024 system clock pulses when the sys-
tem powers up or when it awakes from the HALT state.
When a system power-up occurs, the SST delay is
added during the reset period. But when the reset co-
mes from the RESET pin, the SST delay is disabled.
Any wake-up from HALT will enable the SST delay.
The functional unit chip reset status is shown below.
Timer Counter
A timer counter (TMR) is implemented in the
HT82K68A. The timer counter contains an 8-bit pro-
grammable count-up counter and the clock may come
from the system clock divided by 4.
Using the internal instruction clock, there is only one ref-
erence time-base.
There are two registers related to the timer counter;
TMR ([0DH]), TMRC ([0EH]). Two physical registers are
mapped to TMR location; writing TMR makes the start-
ing value be placed in the timer counter preload register
and reading TMR gets the contents of the timer counter.
The TMRC is a timer counter control register, which de-
fines some options.
In the timer mode, once the timer counter starts count-
ing, it will count from the current contents in the timer
counter to FFH. Once overflow occurs, the counter is re-
loaded from the timer counter preload register and gen-
erates the interrupt request flag (TF; bit 5 of INTC) at the
same time.
Program Counter
Prescaler
WDT
Timer Counter
Input/Output Ports
Stack Pointer
Function
000H
Clear
Clear. After master reset,
WDT begins counting
Off
Input mode
Points to the top of the stack
December 26, 2005
HT82K68A