ht82k96e Holtek Semiconductor Inc., ht82k96e Datasheet - Page 22

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ht82k96e

Manufacturer Part Number
ht82k96e
Description
Ht82k96e -- Usb Multimedia Keyboard Encoder 8-bit Otp Mcu
Manufacturer
Holtek Semiconductor Inc.
Datasheet

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MCU can communicate with endpoint FIFO by setting the corresponding registers, of which address is listed in the fol-
lowing table. After reading current data, next data will show on after 2 s. using to check endpoint FIFO status and re-
sponse to MISC register, if read/write action is still going on.
There are some timing constrains and usages illustrated here. By setting the MISC register, MCU can perform reading,
writing and clearing actions. There are some examples shown in the following table for endpoint FIFO reading, writing
and clearing.
Note:
The definitions of the USB/PS2 status and control register (USC; 1AH) are as shown.
Rev. 2.00
Read FIFO0 sequence
Write FIFO1 sequence
Check whether FIFO0 can be read or not
Check whether FIFO1 can be written or not
Read 0-sized packet sequence form FIFO0
Write 0-sized packet sequence to FIFO1
Bit No.
0
1
2
3
4
5
6
7
Registers
*: There are 2 s existing between 2 reading action or between 2 writing action
FIFO0
FIFO1
FIFO2
FIFO3
RESUME
PS2DAO
PS2CKO
PS2DAI
PS2CKI
RMWK
SUSP
URST
Label
Actions
R/W
R/W
W
W
W
R
R
R
R
Read only, USB suspend indication. When this bit is set to 1 (set by SIE), it indi-
cates the USB bus enters suspend mode. The USB interrupt is also triggered on any
changing of this bit.
USB remote wake up command. It is set by MCU to force the USB host leaving the
suspend mode. When this bit is set to 1 , 2 s delay for clearing this bit to 0 is
needed to insure the RMWK command is accepted by SIE.
USB reset indication. This bit is set/cleared by USB SIE. This bit is used to detect
which bus (PS2 or USB) is attached. When the URST is set to 1 , this indicates a
USB reset is occurred (The attached bus is USB) and a USB interrupt will be initial-
ized.
USB resume indication. When the USB leaves suspend mode, this bit is set to 1
(set by SIE). This bit will appear 20ms waiting for MCU to detect. When the RESUME
is set by SIE, an interrupt will be generated to wake-up the MCU. In order to detecting
the suspend state, MCU should set USBCKEN and clear SUSP2 (in SCC register) to
enable the SIE detecting function. The RESUME will be cleared while the SUSP is
going 0 . When MCU is detecting the SUSP, the RESUME (causes MCU to
wake-up) should be remembered and taken into consideration.
Read only, USBD-/DATA input
Read only, USBD+/CLK input
Data for driving USBD-/DATA pin when work under 3D PS2 mouse function.
(Default= 1 )
Data for driving USBD+/CLK pin when work under 3D PS2 mouse function.
(Default= 1 )
R/W
R/W
R/W
R/W
R/W
00H 01H delay 2 s, check 41H read* from FIFO0 register and
check not ready (01H) 03H 02H
0AH 0BH delay 2 s, check 4BH write* to FIFO1 register and
check not ready (0BH) 09H 08H
00H 01H delay 2 s, check 41H (ready) or 01H (not ready) 00H
0AH 0BH delay 2 s, check 4BH (ready) or 0BH (not ready) 0AH
00H 01H delay 2 s, check 81H read once (01H) 03H 02H
0AH 0BH delay 2 s, check 0BH 0FH 0DH 08H
USC (1AH) Register
Bank
22
1
1
1
1
MISC Setting Flow and Status
Function
Address
4AH
4BH
48H
49H
Data7~Data0
Data7~Data0
Data7~Data0
Data7~Data0
October 11, 2007
HT82K96E
Bit7~Bit0

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