ht82k70e-l Holtek Semiconductor Inc., ht82k70e-l Datasheet - Page 32

• Manufacturer Part Number: ht82k70e-l
• Description: I/o Type 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

SPI Serial Interface
The device include single SPI Serial Interfaces. The SPI
interface is a full duplex serial data link, originally de-
signed by Motorola, which allows multiple devices con-
nected to the same SPI bus to communicate with each
other. The devices communicate using a master/slave
technique where only the single master device can initi-
ate a data transfer. A simple four line signal bus is used
for all communication.
SPI Interface Communication
Four lines are used for SPI communication known as
SDI - Serial Data Input, SDO - Serial Data Output, SCK -
Serial Clock and SCS - Slave Select. Note that the con-
dition of the Slave Select line is conditioned by the
CSEN bit in the SBCR control register. If the CSEN bit is
high then the SCS line is active while if the bit is low then
the SCS line will be in a floating condition. The following
timing diagram depicts the basic timing protocol of the
SPI bus.
Note:
Rev. 1.00
WCOL: set by SPI cleared by users
CSEN: enable/disable chip selection function pin
SBEN: enable/disable serial bus (0: initialise all status flags)
TRF: 1 = data transmitted or received, 0= data is transmitting or still not received
CPOL: I/O = clock polarity rising/falling edge: WSR register bit 0
If clock polarity set to rising edge (SPI_CPOL=1), serial clock timing follow SCK, otherwise (SPI_CPOL=0)
SCK is the serial clock timing.
master mode: 1/0 = with/without SCS output function
Slave mode: 1/0 = with/without SCS input control function
when SBEN=0, all status flags should be initialised
when SBEN=1, all SPI related function pins should stay at floating state
SPI Block Diagram
32
There are three registers associated with the SPI Inter-
face. These are the SBCR register which is the control
register and the SBDR which is the data register and
WSR low nibble byte which is the SPI mode control reg-
ister. The SBCR register is used to setup the required
setup parameters for the SPI bus and also used to store
associated operating flags, while the SBDR register is
used for data storage.
The WSR register low nibble byte is used to select SPI
mode, clock polarity edge selection and SPI enable or
disable selection.
Registers
HT82K70E-L/HT82K76E-L
September 15, 2009