ht82k72e Holtek Semiconductor Inc., ht82k72e Datasheet - Page 24

• Manufacturer Part Number: ht82k72e
• Description: Ht82k72e/ht82k72a -- One Channel Keyboard With R-f Type Mcu
• Manufacturer: Holtek Semiconductor Inc.

Watchdog Timer
The Watchdog Timer is provided to prevent program
malfunctions or sequences from jumping to unknown lo-
cations, due to certain uncontrollable external events
such as electrical noise. It operates by providing a de-
vice reset when the WDT counter overflows. The WDT
clock is supplied by its own internal dedicated internal
WDT oscillator. Note that if the WDT configuration op-
tion has been disabled, then any instruction relating to
its operation will result in no operation.
All Watchdog Timer options, such as enable/disable,
WDT clock source and clear instruction type all selected
through configuration options. There are no internal reg-
isters associated with the WDT in this device. However,
it should be noted that this specified internal clock pe-
riod can vary with VDD, temperature and process varia-
tions. Whether the WDT clock source is its own internal
WDT oscillator, it is further divided by an internal 6-bit
counter and a clearable single bit counter to give longer
Watchdog time-outs. As the clear instruction only resets
the last stage of the divider chain, for this reason the ac-
tual division ratio and corresponding Watchdog Timer
time-out can vary by a factor of two.
The exact division ratio depends upon the residual value
in the Watchdog Timer counter before the clear instruc-
tion is executed. It is important to realise that as there
are no independent internal registers or configuration
options associated with the length of the Watchdog
Timer time-out, it is completely dependent upon the fre-
quency the internal WDT oscillator.
Rev. 1.00
Watchdog Timer Register
Watchdog Timer
24
Under normal program operation, a WDT time-out will
initialise a device reset and set the status bit TO. How-
ever, if the system is in the Power Down Mode, when a
WDT time-out occurs, the TO bit in the status register
will be set and only the Program Counter and Stack
Pointer will be reset. Three methods can be adopted to
clear the contents of the WDT. The first is an external
hardware reset, which means a low level on the RES
pin, the second is using the watchdog software instruc-
tions and the third is via a HALT instruction.
There are two methods of using software instructions to
clear the Watchdog Timer, one of which must be chosen
by configuration option. The first option is to use the sin-
gle CLR WDT instruction while the second is to use the
two commands CLR WDT1 and CLR WDT2. For the
first option, a simple execution of CLR WDT will clear
the WDT while for the second option, both CLR WDT1
and CLR WDT2 must both be executed to successfully
clear the WDT. Note that for this second option, if CLR
WDT1 is used to clear the WDT, successive executions
of this instruction will have no effect, only the execution
of a CLR WDT2 instruction will clear the WDT. Similarly
after the CLR WDT2 instruction has been executed,
only a successive CLR WDT1 instruction can clear the
Watchdog Timer.
HT82K72E/HT82K72A
February 20, 2008