ox16cf950 ETC-unknow, ox16cf950 Datasheet - Page 13

• Manufacturer Part Number: ox16cf950
• Description: Cost Asynchronous Card
• Manufacturer: ETC-unknow

Multi-Purpose I/O Configuration register ‘MIC’ (Offset 0x09)
This register configures the operation for the multi - purpose I/O pins ‘MIO[1:0]’ as follows
Bits
7:4
3:2
1:0
UART Divider/Interrupt Pulse Width Divider register ‘DIV’ (Offset 0x0A)
This register defines t h e divide values (2^N division) for the clocks to the UART and Interrupt pulse generator signal. This allows
the device to be set up in its lowest power mode possible, and is fully programmable by the host or the EEPROM. The default
value for the UART clock divider provides a clock to the UART of x1. The default value for the Interrupt pulse divider provides a
clock to the interrupt processor of /32. See Section 5.4.1 Note that the UART clock rate should not be changed without then
resetting the UART(see SRT register).
Bits
7:6
5:3
2:0
Mode Status register ‘MSR’ (Offset 0x0B)
This read only register return the state of the MODE pin (i.e. whether in Normal or Local Bus modes).
Bits
7:1
0
OXFORD SEMICONDUCTOR LTD.
Description
Reserved
MIO1 Configuration register
00 -> MIO1 is a non-inverting input pin
01 -> MIO1 is an inverting input pin
10 -> MIO1 is an output pin driving ‘0’
11 -> MIO1 is an output pin driving ‘1’
MIO0 Configuration register
00 -> MIO0 is a non-inverting input pin
01 -> MIO0 is an inverting input pin
10 -> MIO0 is an output pin driving ‘0’
11 -> MIO0 is an output pin driving ‘1’
Description
Reserved
Uart clock divide value.
The division ratio is 2^N, giving 1, 2, 4, 8, 16, 32, 64, 128
Interrupt Pulse divide value:
This field should be set under the following clock freq. conditions
000 -> when clock frequency is less than 2MHz
001 -> when clock frequency is between 2 and 4MHz
010 -> when clock frequency is between 4 and 8MHz
011 -> when clock frequency is between 8 and 16MHz
100 -> when clock frequency is between 16 and 32MHz
101 -> when clock frequency is between 32 and 64MHz
110 -> RESERVED
111 -> RESERVED
Description
Reserved
Mode
O = Normal, 1 = Local Bus
Table 8: UART Divider/ Interrupt Pulse Width Divider
Table 7: Multi Purpose I/O Configuration Register
Table 9: Mode Status Register
OXCF950 DATA SHEET V1.1
EEPROM
EEPROM
EEPROM
W
W
W
W
-
-
-
-
Read/Write
Read/Write
Read/Write
PCMCIA
PCMCIA
PCMCIA
R/W
R/W
R/W
R/W
R
R
R
R
Reset
Reset
Reset
0000000
Page 13
0000
000
101
00
00
00
X