pacvga105q California Micro Devices Corporation, pacvga105q Datasheet

pacvga105q

Manufacturer Part Number

pacvga105q

Description

Vga Port Companion Circuit

Manufacturer

California Micro Devices Corporation

Datasheet

1.PACVGA105Q.pdf (6 pages)

Current page: 1 of 6
Download datasheet (94Kb)

01/28/04

Features

•

Applications

•

Simplified Electrical Schematic

7 channels of ESD protection designed to

meet IEC-1000-4-2 Level-4 ESD requirements

(8kV contact discharge)

Very low loading capacitance from ESD protection

diodes at less than 5pF typical

TTL to CMOS level-translating buffers for the

HSYNC and VSYNC lines

Three independent supply pins (V

Graphics Controller ICs

High impedance pull-ups (50kΩ nominal to V

for HSYNC and VSYNC inputs

Pull-up resistors (1.8kΩ nominal to V

DDC_CLK and DDC_DATA lines

Compact 16-pin QSOP package

Lead-free version available

ESD protection and termination resistors for VGA

(video) port interfaces

Desktop PCs

Notebook computers

LCD monitors

AUX

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214

) to facilitate operation with sub-micron

GNDA

RGB

VGA Port Companion Circuit

DDC_DATA

DDC_CLK

HSYNC

VSYNC

, V

RGB

) for

1.8k

and

AUX

GNDD

)

1.8k

Product Description

The PACVGA105 incorporates 7 channels of ESD pro-

tection for signal lines commonly found in a VGA port

for PCs. ESD protection is implemented with current

steering diodes designed to safely handle the high

peak surge currents associated with the IEC-1000-4-2

Level-4 ESD Protection Standard (8kV contact dis-

charge). When the channels are subjected to an elec-

trostatic discharge, the ESD current pulse is diverted

via the protection diodes into the positive supply rails or

ground where they may be safely dissipated.

The upper ESD diodes for the R, G and B channels are

connected to a separate supply rail (V

interfacing to graphics controller ICs with low voltage

supplies. The remaining channels are connected to the

main 5V rail (V

channels are also connected to a dedicated ground pin

(GNDA) to minimize crosstalk due to common ground

impedance.

Two non-inverting buffers are also included in this IC

for buffering the HSYNC and VSYNC signals from the

graphics controller IC. These buffers will accept TTL

input levels and convert them to CMOS output levels

that swing between GND and V

a nominal 60Ω output impedance to match the charac-

teristic impedance of the HSYNC and VSYNC lines of

the video cables typically used. The inputs of these

drivers also have high impedance pull-ups (50kΩ nom.)

pulling

DDC_CLOCK and DDC_DATA channels have 1.8kΩ

resistors pulling these inputs up to the main 5V (V

rail.

50k

L Fax: 408.263.7846

). The lower diodes for the R, G and B

the

AUX

50k

AUX

rail. In

www.calmicro.com

VSYNC_OUT

HSYNC_OUT

PACVGA105

. These drivers have

RGB

addition,

) to facilitate

the

)

Related parts for pacvga105q

pacvga105q Summary of contents

Page 1

Features • 7 channels of ESD protection designed to meet IEC-1000-4-2 Level-4 ESD requirements (8kV contact discharge) • Very low loading capacitance from ESD protection diodes at less than 5pF typical • TTL to CMOS level-translating buffers for the HSYNC ...

Page 2

Note: This drawing is not to scale. LEAD(s) NAME DESCRIPTION 1 HSYNC_OUT Horizontal sync signal buffer output. Connects to the video connector side of the horizontal sync line. 2 HSYNC Horizontal sync signal buffer input. Connects to the VGA Controller ...

Page 3

... Ordering Part Part Marking 1 Number PACVGA105Q PACVGA105Q ABSOLUTE MAXIMUM RATINGS STANDARD OPERATING CONDITIONS L Tel: 408.263.3214 PACVGA105 Lead-free Finish Ordering Part Part Marking 1 Number PACVGA105QR PACVGA105QR RATING [GND - 0.5] to +6.0 20 [GND - 0. 0.5] RGB [GND - 0. 0.5] AUX [GND - 0. 0. +70 -40 to +150 750 ...

Page 4

Specifications (cont’d) ELECTRICAL OPERATING CHARACTERISTICS SYMBOL PARAMETER V Diode Forward Voltage F V Logic High Output Voltage OH V Logic Low Output Voltage OL I Input Current and B pins HSYNC, VSYNC pins HSYNC, VSYNC pins I ...

Page 5

Application Information H-Sync V-Sync DDC_Data DDC_Clk Red Grn Blue VF** - VIDEO EMI Filter SF** - SYNC EMI Filter GNDA, the negative voltage rail for the R, G and B diodes is not connected internally to GNDD. GNDA should ide- ...

Page 6

Mechanical Details QSOP Mechanical Specifications PACVGA105 devices are packaged in 16-pin QSOP packages. Dimensions are presented below. For complete information on the QSOP-16 package, see the California Micro Devices QSOP Package Infor- mation document. PACKAGE DIMENSIONS Package QSOP (JEDEC name ...

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