rt9206 Richtek Technology Corporation, rt9206 Datasheet - Page 16

• Manufacturer Part Number: rt9206
• Description: High Efficiency, Synchronous Buck With Dual Linear Controllers
• Manufacturer: Richtek Technology Corporation

RT9206
For the example of C
T
Shutdown
The power stage can be shutdown by pulling soft-start pin
below 0.7V. During shutdown, both of high side MOSFET
(S1) and low side MOSFET (S2) are turned off.
Setting the switching frequency
The switching frequency can be set by a resistor (R
connecting between RT and GND pins. Equation (16)
describes the relationship of R
As R
www.richtek.com
16
VR
= 57ms, T
Figure 4. The soft-stat timing diagram of RT9206
T
open the normally operated frequency is 200kHz.
T
T
VR
SS
SS
R
= 133ms and T
f
RT
S
R
250
300
350
400
450
500
550
600
(kHz)
T
RT and GND Pins
RT
PGOOD
Connecting Between
SS
=
= 1 F, V
f - 200 10
S
62 10
RT
R
PGOOD
IN
and switching frequency.
RT
37.5
30.6
24.4
22.5
19.3
16.8
= 12V, V
120
8
55
(k )
3
= 640ms.
OUT
( )
V
V
V
PGOOD
SS
DD
OUT
= 5V, then
(16)
RT
)
Boost Component Selection
The booststrap gate drive circuit is used to drive high side
N-channel MOSFET. The boost capacitor should be a good
quality and can operate in high frequency. The value of
boost capacitor depends on the total gate charge (Q
turn on the MOSFETs. Assuming steady state operation,
the following equation can be used to calculate the
capacitance value to achieve the targeted ripple voltage
The capacitor in the range of 0.1uF to 1uF is generally
adequate for most applications.
The VINT pin bypass capacitor C
boost capacitor, to drive the low side MOSFET, and to power
the RT9206. C
with short and wide traces. Generally, a 4.7uF high
frequency ceramic capacitor is recommended.
Feedback Compensation
The RT9206 is a voltage mode controller. The control loop
is a single voltage feedback loop including a trans-
conductance error amplifier and a PWM comparator.
To achieve fast transient response and accurate output
regulation, appropriate feedback compensation is
necessary. The goal of the compensation network is to
provide a closed loop transfer function with the highest
0dB crossing frequency and adequate phase margin.
Generally, the phase margin in a range of 45 ~ 60 is
desirable. Figure 4 shows the simplified diagram of
synchronous buck converter and control loop.
V
BOOT
.
INT
should locate near VINT and GND pins
C
BOOT
=
ΔV
Q
BOOT
Hg
DS9206-11 March 2007
INT
needs to charge the
H
g) to
(F)