ncs5650 ON Semiconductor, ncs5650 Datasheet - Page 7

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ncs5650

Manufacturer Part Number
ncs5650
Description
Ncs5650 2 Amp Plc Line Driver
Manufacturer
ON Semiconductor
Datasheet

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Exposed Thermal Pad
reactive load. Output signal swing should be kept as high as
possible to minimize internal heat generation to keep the
internal junction temperature as low as possible. The
NCS5650 can swing to within 1 V of either rail without
adding distortion. An exposed thermal pad is provided on
the bottom of the device to facilitate heat dissipation.
Application Note AND8402/D provides considerable
details for optimizing the soldering down of the exposed
pad. A very good example of the exposed pad
implementation is provided in the layout information
included with the NCS5650 Demo Board. The demo board
implements 14 vias, each with an 18 mil diameter and
1.5 mils Copper walls.
Multi−Feedback Filter (MFB)
signaling on low−voltage electrical installations in the
frequency range 3 kHz to 148. 5kHz. More specifically Part
1 of that specification deals with frequency bands and
electromagnetic disturbances introduced into the electrical
mains. A practical solution to meet this requirement is to
place a 4th−order filter between the output of the modem and
the isolation transformer connected to the mains. In this
datasheet a MFB filter topology is proposed to help meet the
requirements of the CENELEC standard. Four (4) pole
filters require two op amps for implementation. The
NCS5650 has an input pre−amplifier and an output power
amplifier. Therefore only passive components (R’s and C’s)
need to be added. In addition the NCS5650 has a mid−supply
virtual common at pin 2 (V
of the filter topology when powered from a single−sided
power supply.
stage and the overall filter.
The NCS5650 is capable of delivering 1.5 A, into a
CENELEC EN 50065−1 is a European standard for
Figure 3 below shows the frequency response for each
16
14
12
10
−2
8
6
4
2
0
0.1
Figure 3. Amplifier Voltage vs. Frequency
AmpA Gain
AmpB Gain
Total Gain
1
FREQUENCY (kHz)
com
) to facilitate implementation
10
100
APPLICATIONS INFORMATION
http://onsemi.com
1000
7
Bypassing
with power−supply bypassing placed as physically close to
the device as possible. A parallel combination of 10 mF and
0.01 mF
respectively) for each sensitive point. For either
single−supply operation or split supply operation, bypass
should be placed directly across V
bypass from V
Current Limit (R−Limit)
programmed by the simple addition of a resistor (R
from pin 15 to V
exceed the set current limit, the I
signaling the user to take any necessary action. When the
current output recovers, the I
Low. The curve in Figure 5 is tolerance typically to ±50 mA.
Unlike traditional power amplifiers the NCS5650 current
limits functions both when sourcing and sinking current. To
calculate the resistance required to program a desired
current limit the following equation can be used:
ohms to program the current limit.
Optimal stability and noise rejection will be implemented
The 2 A output current of the NCS5650 can be
Figure 6 graphically illustrates the required resistance in
is
recommended
mC
EE
V
to GND
C11
I
COM
(see Figure 5). If the load current tries to
LIM
2
+ 1.215
11
Figure 4.
Figure 5.
V
10
mc
6
V
EE
R
15
11
CC
7
. Reference Figure 4.
CL
LIM
R
V
(ceramic
LIM
LIM
mC
CC
C13
C5
C14
flag will return to logic
8197
C10
flag will go logic High
to V
C9
C6
V
O
V
EE
O
. In addition add
and
tantalum,
Limit
)

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