pt7a8980 Pericom Technology Inc, pt7a8980 Datasheet - Page 7

• Manufacturer Part Number: pt7a8980
• Description: Pt7a8980/8980l Digital Switch
• Manufacturer: Pericom Technology Inc

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PT0011(12/05)
ST-BUS Timing Reference
All ST-BUS timing is referenced to the C4i and F0i inputs. These
Control Register
The data in the Control Register consists of Mode Control bits,
two clock signals must be synchronized to each other, and
compliant with the timing requirements specified in Figure 9.
The C4i is a 4.096 MHz clock, and the F0i at 8 kHz is the frame
synchronization signal of data stream.
Memory Select bits and Data Stream Address bits (see Figure
3 and Table 4). The Mode Control bits consist of bits 6~7. Bit
7 of the Control Register can put the chip in the Split Read and
Write mode where reads are from the Data Memory and writes
are to the Connection Memory Low.
Table 4. Control Register Bits
Figure 3. Control register Bits
B t i
B t i
B t i
B t i
B
4
2
7
6
5
3 -
0 -
t i
M
M
W
s e
e
p S
A
D
m
r
a s
e t i
d d
a
t i l
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U
a t
N
N
N
e g
N
N
y r
e r
n
B
M
a
a
a
a
a
R
s u
S
s t i
m
m
m
M
s s
m
m
e S
e
o
r t
d e
d a
e d
e
e
e
e
e
o
a e
e l
B
Mode Control Bits
e d
s t i
i t c
m
&
B
B
t i
n o
t i
1
1
r a
R
u s
C
c
0
0
S
W
W
t
e h
0 -
1 -
a h
0 -
1 -
e p
h
g e
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s b
h
h
n a
7
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n e
b
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C
C
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N
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M
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6
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D
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m
Unused Bit Memory Select Bits
m
n o
n o
u o
a
r e
s
e c
m
a t
w
r c i
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o
C
i t a
p t
y r
M
M
t i
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e
n o
M
p o
m
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h c
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e
e
5
d e
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e
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m
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o
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o
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t
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e h
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H
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r o
a
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4
M
o
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a s
S
w
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T
l h
W
e
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7
B -
m
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l
r e t
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h
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o
o
Bit 6, when 1, sets all the 256 output channels of the chip into
Message Mode. In this mode, the Contents of all Connection
Memory Low are output on the ST-BUS output data streams
every frame unless the ODE pin is low. The chip behaves as if
the bits 2 and 0 of every Connection Memory High location
were 1.
Bits 4~3 are the Memory Select bits that determine the accessed
location is in the Connection Memory High, Low or Data
Memory.
The Data Stream Select bits, Bits 0~2, specify which memory
location of the eight input and output data streams is addressed.
M
U
m
n e
a f
y r
t f
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s e
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3
S
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0
r a
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t ,
s i
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t e
e
m
p t
g i
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s e
T
D
D
D
D
D
n i
t o
t u
r c i
e h
t h
o p
s e
s e
s e
s e
s e
2
e h
p s
M
p o
h c
n i
d n
r c
r c
r c
r c
r c
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Data Stream Address Bits
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