pt7a4408 Pericom Technology Inc, pt7a4408 Datasheet

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pt7a4408

Manufacturer Part Number
pt7a4408
Description
T1/e1/oc3 System Synchronizer
Manufacturer
Pericom Technology Inc
Datasheet
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PT0106(09/02)
Features
• Supports AT&T TR62411 Stratum 4 and
• Supports ITU-T G.812 Type IV clocks for
Applications
• Synchronization and timing control for multitrunk
Stratum 4 Enhanced for DS1 interfaces and for
ETSI ETS 300 011, TBR 4, TBR 12, and TBR
13 for E1 interfaces
1.544kbit/s interfaces and 2.048kbit/s interface
Provides C1.5, C3, C2, C4, C8, C6, C16 and C19
output clock signals
Provides five kinds of 8kHz ST-BUS framing
signals
Input reference frequency 1.544MHz, 2.048MHz
or 8kHz selectable
Normal or Free-Run operating modes available
Power supply: 5V (4408) and 3.3V(4408L)
T1 and E1 systems, STS-3/OC3 systems
ST-BUS clock and frame pulse sources
Primary Trunk Rate Converters
1
Introduction
PT7A4408/4408L employs a digital phase-locked
loop (DPLL) to provide timing and synchronizing
signals for multitrunk T1 and E1 primary rate
transmission links, and for STS-3/OC3 links. The ST-
BUS clock and framing signals are phase-locked to
input reference signals of either 2.048 MHz,
1.544MHz or 8 kHz.
The PT7A4408/4408L meets the requirements for
AT&T TR62411 Stratum 4 and Stratum 4 Enhanced,
and ETSI ETS 300 011 in jitter tolerance, jitter trans-
fer, intrinsic jitter, frequency accuracy, capture range,
phase slope, etc.
The PT7A4408/4408L operates in Normal or Free-
run Mode.
Ordering Information
P
P
P
P
P
P
T1/E1/OC3 System Synchronizer
P
a
a
a
a
a
T
T
t r
t r
t r
t r
t r
7
7
A
N
N
N
A
N
N
4 4
4
u
u
u
u
u
0 4
m
m
m
m
m
8 0
b
b
b
b
b
J 8
J L
r e
r e
r e
r e
r e
PT7A4408/4408L
4 4
4 4
P
P
P
P
P
P -
P -
Data Sheet
c a
c a
c a
c a
c a
n i
n i
a k
a k
a k
a k
a k
P
P
e g
e g
e g
L
L
e g
e g
C
C
C
C
Ver:0

Related parts for pt7a4408

pt7a4408 Summary of contents

Page 1

... The PT7A4408/4408L meets the requirements for AT&T TR62411 Stratum 4 and Stratum 4 Enhanced, and ETSI ETS 300 011 in jitter tolerance, jitter trans- fer, intrinsic jitter, frequency accuracy, capture range, phase slope, etc. The PT7A4408/4408L operates in Normal or Free- run Mode. Ordering Information ...

Page 2

... Functional Description ................................................................................................................................ 7 Overall Operation ................................................................................................................................. 7 Modes of Operation .............................................................................................................................. 9 Applications Information ...................................................................................................................... 9 Detailed Specifications .............................................................................................................................. 10 Definitions of Critical Performance Specifictions ............................................................................... 10 Absolute Maximum Ratings ............................................................................................................... 11 Recommended Operating Conditions ................................................................................................. 11 DC Electrical and Power Supply Characteristics ................................................................................ 12 AC Electrical Characteristics .............................................................................................................. 13 Mechanical Specifications ......................................................................................................................... 26 Note .......................................................................................................................................................... 27 PT0106(09/02) T1/E1/OC3 System Synchronizer Contents 2 Data Sheet PT7A4408/4408L Ver:0 ...

Page 3

... TDI IEEE 1149.1a TMS TRST TDO REF Phase Detector PT0106(09/02) T1/E1/OC3 System Synchronizer V GND CC Loop DPLL Filter Feedback Frequency Mode Control MS 3 Data Sheet PT7A4408/4408L ACKi APLL ACKo C1 Output C6 Interface C8 Circuit C16 C19 F0 F8 F16 RSP TSP Select MUX FS1 ...

Page 4

... PLCC Top View 4 Data Sheet PT7A4408/4408L ...

Page 5

... Data Sheet PT7A4408/4408L ...

Page 6

... Data Sheet PT7A4408/4408L ...

Page 7

... The DPLL circuit provides synchronization of the output sig- nals with any given input reference signal. Master Clock The PT7A4408/4408L uses either an external clock source or an external crystal and a few discrete components with its internal oscillator as the master clock. Feedback Frequency Select MUX ...

Page 8

... Tapped Delay Line in the Output Interface Circuit to produce 12.352MHz, 12.624MHz, 19.44MHz and 16.384MHz signals. The DCO synchronization method depends upon the PT7A4408/4408L operating state, as follows: In Normal state, the DCO generates four output signals which are frequency and phase locked to the selected input reference signal ...

Page 9

... Master Clock The PT7A4408/4408L uses either an external clock source or an external crystal as the master timing source. In Free-Run State, the frequency tolerance of the PT7A4408/ 4408L output clocks are equal to the frequency tolerance of the timing source application accurate Free-Run State is not required, the tolerance of the master timing source may be 100ppm ...

Page 10

... Crystal Oscillator If a crystal oscillator is selected as the master timing source, it should be connected to the PT7A4408/4408L as shown in Figure 6. Figure 6. Crystal Oscillator Connection PT7A4408/4408L 20MHz OSCi 56pF 1M OSCo 100 The crystal specification is as follows: - Frequency: 20MHz - Tolerance: as required - Oscillation Mode: Fundamental - Resonance Mode: ...

Page 11

... A PT0106(09/02) T1/E1/OC3 System Synchronizer Lock Range: If the PT7A4408/4408L DPLL is already in a state of synchronization (“lock”) with the incoming reference = 2.5UI signal able to track this signal to maintain lock as its frequency varies over a certain range, called the Lock Range 3.3UI ...

Page 12

... and V measurement Data Sheet PT7A4408/4408L ...

Page 13

... Data Sheet PT7A4408/4408L * ...

Page 14

... Timing Reference Points 14 Data Sheet PT7A4408/4408L ...

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... Data Sheet PT7A4408/4408L ...

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... Data Sheet PT7A4408/4408L ...

Page 17

... R15D R2D Data Sheet PT7A4408/4408L ...

Page 18

... PT0106(09/02) T1/E1/OC3 System Synchronizer t F0WL t C16WL t t C8W C8W t C4W t C4W t C2W t C3W t C15W t C6W C6W t C19W t C19W t RSPD t TSPW t TSPD 18 Data Sheet PT7A4408/4408L t F8WH F0D F16D t F16WL C16D C8D C4D C2D C3D ...

Page 19

... Data Sheet PT7A4408/4408L ...

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... Data Sheet PT7A4408/4408L ...

Page 21

... Data Sheet PT7A4408/4408L ...

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... Data Sheet PT7A4408/4408L ...

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... Data Sheet PT7A4408/4408L ...

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... Data Sheet PT7A4408/4408L ...

Page 25

... For Free-Run State of ±100ppm. 18. For capture range of ±230ppm. 19. For capture range of ±198ppm. 20. For capture range of ±130ppm. 21. 25pF capacitive load. PT0106(09/02) PT7A4408/4408L T1/E1/OC3 System Synchronizer 22. OSCi Master Clock Jitter is less than 2ns p-p, or 0.04UI p-p where 1UI p-p = 1/20MHz. 23. Jitter on reference input is less than 7ns p-p. 24. Applied jitter is sinusoidal. ...

Page 26

... Mechanical Specifications Figure 13. 44-pin PLCC PT0106(09/02) PT7A4408/4408L T1/E1/OC3 System Synchronizer 26 Data Sheet Ver:0 ...

Page 27

... Pericom Technology product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom Technology Incorporation. PT0106(09/02) T1/E1/OC3 System Synchronizer Note Pericom Technology Inc. Web-Site: www.pti.com.cn, www.pti-ic.com Fax: (86)-21-6485 2181 Fax: (852)- 2243 3667 Fax: (1)-408-435 1100 27 Data Sheet PT7A4408/4408L Ver:0 ...

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