71m6513h-igt Maxim Integrated Products, Inc., 71m6513h-igt Datasheet - Page 58

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71m6513h-igt

Manufacturer Part Number
71m6513h-igt
Description
3-phase Energy Meter Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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DIO_DIR1[7:0]
DIO_DIR2[5:0]
DIO_0[7:0]
DIO_1[7:0]
DIO_2[5:0]
DIO_EEX
DIO_PV
DIO_PW
EEDATA[7:0]
EECTRL[7:0]
ECK_DIS
EQU[2:0]
EX_XFR
EX_RTC
FIR_LEN
FLASH66Z
FLSH_ERASE
Page: 58 of 96
SFR 91
SFR A1[5:0]
SFR 80
SFR 90
SFR A0[5:0]
2008[4]
2008[2]
2008[3]
SFR 9E
SFR 9F
2005[5]
2000[7:5]
2002[0]
2002[1]
2005[4]
2005[1]
SFR 94
R/W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
© 2005-2008 TERIDIAN Semiconductor Corporation
Port 0
Port 1
Port 2
When set, converts DIO4 and DIO5 to interface with external
EEPROM. DIO4 becomes SCK and DIO5 becomes bi-directional SDA.
LCD_NUM must be less than 18.
Causes VARPULSE to be output on DIO7, if DIO7 is configured as
output. LCD_NUM must be less than 15.
Causes WPULSE to be output on DIO6, if DIO6 is configured as
output. LCD_NUM must be less than 16.
Serial EEPROM interface data
Serial EEPROM interface control
Emulator clock disable. When one, the emulator clock is disabled.
operations. If ECK_DIS is set, it should be done at least 1000ms after
power-up to give emulators and programming devices enough time to
complete an erase operation.
Specifies the power equation to the CE.
Interrupt enable bits. These bits enable the XFER_BUSY and the
RTC_1SEC interrupts to the MPU. Note that if either interrupt is to be
enabled, EX6 in the 80515 must also be set.
The length of the ADC decimation FIR filter.
1: 22 ADC bits/3 CK32 cycles (384 CKFIR cycles),
0: 21 ADC bits/2 CK32 cycles (288 CKFIR cycles)
Should be set to 1 to minimize supply current.
Flash Erase Initiate
FLSH_ERASE is used to initiate either the Flash Mass Erase cycle or
the Flash Page Erase cycle. Specific patterns are expected for
FLSH_ERASE in order to initiate the appropriate Erase cycle.
(default = 0x00).
0x55 – Initiate Flash Page Erase cycle. Must be proceeded by a write
0xAA – Initiate Flash Mass Erase cycle. Must be proceeded by a write
Any other pattern written to FLSH_ERASE will have no effect.
Programs the direction of DIO pins 15 through 8. 1 indicates output.
Ignored if the pin is not configured as I/O.
Programs the direction of DIO pins 21 through 16. 1 indicates output.
Ignored if the pin is not configured as I/O.
to FLSH_PGADR @ SFR 0xB7.
to FLSH_MEEN @ SFR 0xB2 and the debug (CC) port must
be enabled.
face and thus preclude flash erase and programming
This bit is to be used with caution! Inadvertently setting
this bit will inhibit access to the part with the ICE inter-
The value on the DIO pins. Pins configured as LCD will read
zero. When written, changes data on pins configured as out-
puts. Pins configured as LCD or input will ignore writes.
3-Phase Energy Meter IC
71M6513/71M6513H
DATA SHEET
AUGUST 2008
V2.5

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