ICS650-05 Integrated Circuit System, ICS650-05 Datasheet

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... Description The ICS650- low cost, low jitter, high performance clock synthesizer designed to produce 74.175824 MHz and 74.250000 MHz as necessary for HDTV applications. Using our patented analog Phase- Locked Loop (PLL) techniques, the device uses a 27.0 MHz clock or fundamental crystal input to produce buffered, fixed clocks and a selectable frame rate clock for HDTV systems ...

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... Connect to +3 +5.0 V. Must be same as other VDDs. Frame Rate Clock as shown on table. Frame Rate Frequency Select input pin. Determines FRCLK output as shown on table. Output Enable. Tri-states all clocks when low. Connect to +3 +5.0 V. Must be same as other VDDs. 2 ICS650-05 HDTV Clock Synthesizer FRCLK Pin 17 0 74.175824 1 74 ...

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... At VDD/2 40 VDD = 3.3V, 13.5M, FRCLK, 27M (pin 12) VDD=3.3V, 27M (pin8), 54M VDD=5.0V, except 27M (pin8) VDD = 5.0V, 27M (pin 8) VDD=3.3V, except 27M (pin 8), 54M VDD=3.3V, 27M (pin 8), 54M VDD=5.0V 3 ICS650-05 Typical Maximum Units 7 V VDD+0 °C 260 °C 150 °C 5 VDD/2-1 ...

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... Integrated Circuit Systems • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com Marking Package ICS650R-05 20 pin SSOP ICS650R-05 20 pin SSOP 4 ICS650-05 HDTV Clock Synthesizer 20 pin SSOP Inches Inches Symbol Min Max A 0.053 0.069 A1 0.004 0.010 b 0 ...