xr16l2751im Exar Corporation, xr16l2751im Datasheet - Page 21

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xr16l2751im

Manufacturer Part Number
xr16l2751im
Description
2.25v To 5.5v Duart With 64-byte Fifo And Powersave
Manufacturer
Exar Corporation
Datasheet

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xr
REV. 1.2.2
The 2751 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 13
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held HIGH or mark condition while the CTS#, DSR# CD# and
RI# inputs are ignored. Caution: the RX input pins must be held to a logic 1 during loopback test else upon
exiting the loopback test the UART may detect and report a false “break” signal. Also, Auto RTS/CTS hardware
flow control is not supported during internal loopback.
2.21
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
13. I
NTERNAL
Transmit Shift Register
Receive Shift Register
L
OOP
(RHR/FIFO)
(THR/FIFO)
B
ACK IN
2.25V TO 5.5V DUART WITH 64-BYTE FIFO AND POWERSAVE
C
RTS#
CTS#
DTR#
DSR#
OP2#
CD#
RI#
HANNEL
MCR bit-4=1
21
VCC
OP1#
VCC
VCC
A
VCC
AND
B
TXA/TXB
RXA/RXB
RTSA#/RTSB#
CTSA#/CTSB#
DTRA#/DTRB#
DSRA#/DSRB#
RIA#/RIB#
CDA#/CDB#
OP2A#/OP2B#
XR16L2751

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