xr16v698 Exar Corporation, xr16v698 Datasheet - Page 36

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xr16v698

Manufacturer Part Number
xr16v698
Description
2.25v To 3.6v High Performance Octal Uart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet

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Manufacturer:
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Quantity:
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XR16V698
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
FCR[3]: DMA Mode Select
This bit has no effect since TXRDY and RXRDY pins are not available in this device. It is provided for legacy
software compatibility.
FCR[2]: TX FIFO Reset
This bit is only active when FCR bit-0 is active.
FCR[1]: RX FIFO Reset
This bit is only active when FCR bit-0 is active.
FCR[0]: TX and RX FIFO Enable
The Line Control Register is used to specify the asynchronous data communication format. The word or
character length, the number of stop bits, and the parity are selected by writing the appropriate bits in this
register.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL, DLM, DLD) enable.
4.6
Logic 0 = Set DMA to mode 0 (default).
Logic 1 = Set DMA to mode 1.
Logic 0 = No transmit FIFO reset (default).
Logic 1 = Reset the transmit FIFO pointers and FIFO level counter logic (the transmit shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
Logic 0 = No receive FIFO reset (default).
Logic 1 = Reset the receive FIFO pointers and FIFO level counter logic (the receive shift register is not
cleared or altered). This bit will return to a logic 0 after resetting the FIFO.
Logic 0 = Disable the transmit and receive FIFO (default).
Logic 1 = Enable the transmit and receive FIFOs. This bit must be set to logic 1 when other FCR bits are
written or they will not be programmed.
Logic 0 = Data registers are selected (default).
Logic 1 = Divisor latch registers (DLL, DLM and DLD) are selected.
Line Control Register (LCR) - Read/Write
B
FCR
IT
0
0
1
1
-7
T
ABLE
B
FCR
IT
0
1
0
1
14: T
-6
RANSMIT AND
B
FCR
IT
0
0
1
1
-5
FCR
BIT
0
1
0
1
R
-4
ECEIVE
R
ECEIVE
FIFO T
L
EVEL
16
24
28
8
36
T
RIGGER
RIGGER
T
T
RIGGER
ABLE AND
T
RANSMIT
16
24
30
8
L
EVEL
L
EVEL
16C650A, 16L651
S
C
ELECTION
OMPATIBILITY
REV. 1.0.2

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